Segmented Wire Widening for IC Layout Voltage Drop Reduction

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Solution Overview

Problem

Conventional wire-widening tools in integrated circuit layout design are inefficient and costly, failing to fully utilize available layout space due to complex geometry, leading to substantial voltage drops and performance degradation.

Innovation Solution

A method for dividing wires into segments and replacing them with widened segments of a preset shape, such as octagons, to maintain proper spacing with adjacent objects, reducing computational complexity and resource usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If wire width is increased to reduce electrical resistance, then voltage drop is reduced, but available layout space is consumed

Engineering Contradiction:
Improvevoltage dropVSAvoidlayout space
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The wire is divided into multiple segments, allowing selective widening of only those portions where space permits. This segmentation enables the routing system to increase wire width for current-carrying sections while maintaining narrower widths in space-constrained areas, thus reducing voltage drop without unnecessarily consuming layout space.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different segments of the wire are assigned different widths based on local requirements. Critical segments carrying high current are widened to reduce resistance, while non-critical segments maintain minimal width. This local differentiation optimizes the balance between electrical performance and space utilization.

Inventive Principle:
Principle #3Local quality

2Ease of manufacture

If conventional wire-widening tools are used to handle complex layout geometry, then wire widening is performed, but computing resources and time are excessively consumed

Engineering Contradiction:
Improvewire widening capabilityVSAvoidcomputational time
Core Design Contradiction:
Ease of manufactureVSLoss of time

Solution Approach 1:

By dividing the wire into segments, the computational problem is broken down into smaller, independent sub-problems. Each segment can be processed separately and efficiently, avoiding the need for complex iterative calculations across the entire wire length, thus reducing computational time and resource consumption.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The algorithm applies wire widening selectively to only those segments where it is both needed and feasible, rather than attempting to widen the entire wire uniformly. This partial action approach avoids unnecessary computational overhead while still achieving the required electrical performance in critical areas.

Inventive Principle:
Principle #16Partial or excessive action

3Manufacturing precision

If ad hoc or iterative methods are used for wire widening, then wire spacing is adjusted, but large computing resources are required

Engineering Contradiction:
Improvewire spacingVSAvoidcomputing resources
Core Design Contradiction:
Manufacturing precisionVSQuantity of substance

Solution Approach 1:

The wire spacing adjustment problem is divided into segment-level decisions rather than requiring global iterative optimization. Each segment's spacing can be determined independently based on local constraints, eliminating the need for resource-intensive iterative methods while maintaining manufacturing precision.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The segmentation algorithm enables each wire segment to determine its own optimal width and spacing based on local geometric constraints and electrical requirements, without requiring centralized iterative coordination. This self-service approach significantly reduces computing resource requirements while maintaining precision.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS9721056B2Method for wire widening in circuit routing system
Publication Date: 2017.08.01 SYNOPSYS INC
  • US9721056B2 patent drawing
  • US9721056B2 patent drawing
  • US9721056B2 patent drawing

AI summary

A method for designing an integrated circuit (IC) includes, in part, dividing the wires disposed in the IC into a multitude of segments each having a length extending from a first end point to a second end point. Each segment is then widened without overlapping any adjacent object. As an example, an intermediate, or expanded, segment is formed that includes the first and the second end points and has a size to overlap with an adjacent object. The method includes identifying regions in the adjacent objects that overlap with the expanded segment. For each of the identified regions, an expanded region is formed, which has a shape and size to enclose the identified object with additional spacing around the perimeter. Next, the size of the expanded segment is reduced to form the wide segment such that the wide segment does not overlap any of the adjacent expanded objects.