Select Gate Transistors with Multiple Work Functions
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Solution Overview
Problem
3D NAND memory devices face challenges in programming due to a reduced window of acceptable control gate voltages for select gate transistors, which affects programming speed and inhibits memory cells, exacerbated by drain-induced barrier lowering (DIBL) and process variations, leading to impaired programming performance.
Innovation Solution
The use of select gate transistors with multiple work functions and different control gate overdrive voltages, where the higher work function material is positioned before the lower work function material relative to the bit line, and SGD transistors are programmed to different threshold voltages to reduce DIBL and enhance the Ion/Ioff ratio, thereby improving the Vsgd window and programming capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If select gate transistors use a single work function material, then device structure is simple, but the Vsgd window is reduced and programming performance is impaired
Solution Approach 1:
The patent applies local quality by using different work function materials at different locations within the select gate transistor. Specifically, the control gate is divided into first and second portions with different work function materials (e.g., tungsten for first portion, cobalt for second portion), allowing each region to be optimized for its specific function while maintaining overall device performance
Solution Approach 2:
The patent employs composite materials by combining multiple work function materials (such as tungsten and cobalt, or titanium nitride and tantalum nitride) within the same select gate transistor control gate. This composite structure enables the transistor to achieve both high Ion current and low Ioff current characteristics, thereby increasing the Vsgd window and improving programming reliability
2Use of energy by moving object
If control gate voltage window is small, then power consumption is reduced, but programming speed decreases and unselected cell inhibition is impaired
Solution Approach 1:
The patent changes the work function parameter of the control gate materials to optimize the voltage window. By selecting materials with specific work functions (e.g., higher work function for first portion, lower work function for second portion), the patent expands the Vsgd window, enabling faster programming speeds and better unselected cell inhibition while maintaining acceptable power consumption levels
3Ease of manufacture
If drain-induced barrier lowering is high, then device fabrication is easier, but select gate transistor control is reduced and programming reliability is impaired
Solution Approach 1:
The patent addresses DIBL by applying local quality through spatially varying work function materials in the control gate. The first portion with higher work function provides stronger barrier control near the drain, while the second portion with lower work function optimizes threshold voltage, collectively reducing DIBL effects and improving select gate control without complicating fabrication processes
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively increases the Vsgd window, improves programming speed, and inhibits unselected memory cells, enhancing the overall programming performance and reliability of 3D NAND memory devices by reducing DIBL and process variation impacts.
Implementation Method 1
select gate transistors with multiple work functions and different control gate overdrive voltages, where the higher work function material is positioned before the lower work function material relative to the bit line
Implementation Method 2
exacerbated by drain-induced barrier lowering (DIBL) and process variations, leading to impaired programming performance
Data Source
AI summary
In a 3D stacked non-volatile memory device, multiple smaller drain-end selected gate (SGD) transistors replace one larger SGD transistor. The SGD transistors have different work functions in their control gates so that, during a programming operation, a discontinuous channel potential is created in an inhibited NAND string. The SGD transistor closest to the bit line has a higher work function so that the channel potential under it is lower, and the next SGD transistor has a lower work function so that the channel potential under it is higher. The different work functions can be provided by using different control gate materials for the SGD transistors. One option uses p+ polysilicon and n+ polysilicon to provide higher and lower work functions, respectively. Metal or metal silicide can also be used. A single SGD transistor with different control gate materials could also be used.


