Semiconductor Storage Select Gate Line Voltage Control
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Solution Overview
Problem
Existing semiconductor storage devices face challenges in efficiently integrating and operating select gate lines due to limitations in voltage control and transistor states, which affect program operations and memory cell programming.
Innovation Solution
A semiconductor storage device is designed with a specific configuration that includes a first memory string, a select gate line connected to a gate electrode of a select transistor, and a sense amplifier unit connected to a bit line. The device employs a program operation method that involves setting specific voltages for the bit line and select gate line in different periods to control the states of the transistors effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a conventional sense amplifier unit configuration is used, then the device structure is simple, but the program operation efficiency and transistor state control are insufficient
Solution Approach 1:
The sense amplifier unit is divided into multiple functional transistors (first transistor, second transistor, third transistor, fourth transistor) with distinct roles. Each transistor handles specific voltage control tasks for the bit line and select gate line, enabling precise control of transistor states during program operations while maintaining modular architecture
Solution Approach 2:
The patent implements dynamic voltage control by applying different voltages to the gate electrodes of the first and second transistors based on the operational phase. During program operations, the gate voltage of the first transistor is controlled to be higher than that of the second transistor, enabling adaptive control of current flow and transistor conduction states to improve program operation efficiency
2Manufacturing precision
If voltage control is simplified, then the control circuit is easier to implement, but the precision of transistor state control deteriorates
Solution Approach 1:
Different gate electrodes receive different voltage levels tailored to their specific functions. The first transistor's gate electrode receives a higher voltage during program operations to ensure strong conduction, while the second transistor's gate electrode receives a lower voltage to maintain appropriate control, achieving precise local control of transistor states
Solution Approach 2:
The patent changes the voltage parameter dynamically based on operational requirements. During program operations, the voltage applied to the first transistor's gate is increased relative to the second transistor's gate, allowing precise control of the current flow characteristics and transistor conduction states without requiring complex control circuitry
3Manufacturing precision
If the sense amplifier unit uses a conventional configuration, then the device integration is easier, but the program operation accuracy for select gate lines is insufficient
Solution Approach 1:
The sense amplifier unit is segmented into four distinct transistors with specialized functions. The first and second transistors control current flow to the bit line, while the third and fourth transistors control the select gate line voltage, enabling precise and independent control of programming operations for improved accuracy
Solution Approach 2:
The patent implements dynamic voltage control where the gate voltages of the first and second transistors are adjusted based on the operational phase. During program operations, the first transistor receives a higher gate voltage to ensure strong conduction, while the second transistor receives a lower voltage, enabling precise control of the voltage difference across the bit line for accurate memory cell programming
Data Source
AI summary
A semiconductor storage device includes a bit line, a select gate line, a sense amplifier circuit, a first transistor between the bit line and the sense amplifier circuit, and a second transistor between the bit line and a voltage generation circuit. In a first period of a program operation, the first transistor is turned OFF and the second transistor is turned ON, and a voltage of the first bit line is at a first voltage and a voltage of the select gate line is at a second voltage. In a second period of the program operation, the first transistor is turned ON and the second transistor is turned OFF, and a voltage of the first bit line is at a third voltage less than the first voltage and a voltage of the select gate line is at a fourth voltage greater than the second voltage.