Selectable Threshold Reset Circuit for Low Voltage IC Testing
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Solution Overview
Problem
Existing reset circuits in integrated circuit packages prevent low voltage testing by disabling the RESET signal before the power supply voltage reaches the reset threshold, making it difficult to determine if digital circuits operate properly at voltages below the reset threshold.
Innovation Solution
A selectable threshold reset circuit that allows the reduction of the reset threshold voltage without disabling the RESET signal, enabling low voltage testing by selectively changing the voltage level at which the RESET signal is outputted, allowing the circuit to operate properly at reduced power supply voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the reset circuit outputs the RESET signal before the power supply voltage reaches a voltage below the reset threshold, then the digital circuit is forced into reset, but low voltage testing cannot be performed
Solution Approach 1:
The patent implements a test mode that dynamically changes the reset threshold voltage level. When test mode is activated, the reset threshold is lowered to enable the digital circuit to operate below the normal reset threshold, allowing low voltage testing to proceed without the reset circuit prematurely disabling the digital circuit
Solution Approach 2:
The patent changes the parameter of reset threshold voltage by providing two different threshold levels: a first reset threshold voltage during normal operation and a second, lower reset threshold voltage during test mode. This parameter change enables the digital circuit to be tested at voltages below the normal reset threshold while maintaining proper reset functionality
2Adaptability or versatility
If the power supply voltage is reduced below the reset threshold to test digital circuit operation, then low voltage testing can be performed, but the reset circuit disables the digital circuit before testing can occur
Solution Approach 1:
The patent applies preliminary action by lowering the reset threshold voltage before low voltage testing begins. The test mode is activated in advance to change the reset threshold from the first level to the second, lower level, ensuring that the reset circuit will not disable the digital circuit during the upcoming low voltage testing sequence
3Adaptability or versatility
If a test mode is implemented to inhibit RESET signal generation, then low voltage testing can be performed, but the integrated circuit may inadvertently enter test mode and it is difficult to determine if it has exited
Solution Approach 1:
The patent implements feedback by monitoring the test mode enable signal state and automatically deactivating test mode when normal operation conditions are detected. The system provides feedback about the operational state and adjusts the reset threshold accordingly, ensuring that test mode is properly entered and exited without requiring complex external control logic
Data Source
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AI summary
A low voltage testing circuit (125), system (100 and 200), and method for performing low-voltage testing of a circuit (127) in an integrated circuit package (104 and 204) include a selectable threshold reset circuit (125) that includes a voltage-divider ladder (320) that produces a voltage that is a fraction of a power supply voltage, a comparator (310) that compares the fraction with a reference voltage, a switch (350) that controls topology of the voltage-divider ladder thereby changing a value of the fraction, the switch controlled by a signal from a production tester (102 and 202), the signal causing a reset threshold of the selectable threshold reset circuit to be reduced below a normal reset threshold to allow testing of the circuit at a power supply voltage below the normal reset threshold.