Selection Circuit Serializing Data With Reduced Transistor Switching
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Transmitter circuits consume high power due to frequent switching of transistors as they handle multiple clock signals, leading to increased power consumption during serial data signal generation.
Innovation Solution
A transmitter circuit with a selection circuit that generates serial data signals using partially toggled data selection signals, incorporating a clock generator to produce clock signals with different phases and a data multiplexer to control the output node based on logic operations between data signals and clock signals, reducing power consumption by maintaining some data selection signals at constant logic levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If multiple clock signals with different phases are used to generate serial data signals, then the serializing operation speed is improved, but the power consumption increases due to frequent transistor switching
Solution Approach 1:
The patent applies partial action by selectively toggling only necessary data selection signals based on the actual data values. When parallel data signals maintain the same logic level, the corresponding data selection signals are kept constant rather than toggled, thereby reducing transistor switching events while still achieving proper serial data output during valid data periods
2Reliability
If all data selection signals are toggled during serializing operation, then the serial data signal generation is ensured, but the number of switched transistors increases leading to higher power consumption
Solution Approach 1:
The patent implements local quality by applying different toggling behaviors to different data selection signals based on their corresponding data values. Signals corresponding to unchanged data levels are maintained at constant logic levels, while only necessary signals are toggled, creating localized optimization in the signal generation process that reduces overall power consumption
3Productivity
If the logic level of data selection signals is constantly changed, then the serial data output is maintained, but the transistor switching frequency increases and power consumption rises
Solution Approach 1:
The patent applies periodic action by synchronizing data selection signal toggling with the clock signal periods. Toggling occurs only during specific clock cycles when data values actually change, while during periods when data remains constant, the selection signals are held steady, thereby reducing unnecessary switching events while maintaining proper serial data output timing
Data Source
AI summary
A transmitter circuit includes a clock generator configured to generate a plurality of clock signals having different phases, and a plurality of selection circuits configured to receive a plurality of parallel data signals and output a serial data signal on an output node based on the plurality of clock signals and the received plurality of parallel data signals. Each of the plurality of selection circuits includes a data multiplexer configured to generate a plurality of data selection signals based on the received one of the plurality of parallel data signals and the plurality of clock signals; a control signal generator configured to generate first and second control signals based on the plurality of data selection signals; and an output driver connected to the output node, and configured to precharge the output node based on the first control signal or discharge the output node based on the second control signal.