Selective Blocking Boundary Placement for Electromigration Reliability
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Solution Overview
Problem
As integrated circuits are scaled to smaller dimensions, interconnect linewidths become increasingly susceptible to electromigration, leading to reliability issues due to higher current densities.
Innovation Solution
The method involves depositing an insulating layer over a semiconductor substrate, etching trenches for copper, selectively recessing copper at specific locations, and forming self-aligned conducting caps to create a blocking boundary at via interfaces, thereby leveraging the electromigration short-length effect to enhance reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If interconnect linewidth is reduced to increase density, then device density and performance are improved, but susceptibility to electromigration increases
Solution Approach 1:
The patent applies different structural qualities to different locations of the interconnect. Specifically, it creates a dual-structure interconnect where a first portion has a wider linewidth and a second portion has a narrower linewidth. This local differentiation allows the narrower portion to achieve higher density while the wider portion maintains lower electromigration susceptibility, thus resolving the contradiction between density and reliability.
2Reliability
If copper is selectively recessed at specific trench locations, then electromigration lifetime is increased through short-length effect, but via resistance may increase
Solution Approach 1:
The patent selectively recesses copper in specific trench locations rather than uniformly across all trenches. This localized approach creates short-length interconnect effects only where needed for electromigration protection, while leaving other areas with full copper fill to maintain low via resistance. The selective application resolves the contradiction between improving electromigration lifetime and controlling via resistance.
Data Source
AI summary
A method is presented for forming a semiconductor structure. The method includes depositing an insulating layer over a semiconductor substrate, etching the insulating layer to form trenches for receiving copper (Cu), selectively recessing the Cu at one or more of the trenches corresponding to circuit locations requiring electromigration (EM) short-length, and forming self-aligned conducting caps over the one or more trenches where the Cu has been selectively recessed. The conducting caps can be tantalum nitride (TaN) caps. The method further includes forming a via extending into each of the trenches for receiving Cu. Additionally, the via for trenches including recessed Cu extends to the self-aligned conducting cap, whereas the via for trenches including non-recessed Cu extends to a top surface of the Cu.