Selective Blocking Dielectric Formation in 3D Memory
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Solution Overview
Problem
Current three-dimensional memory structures, such as vertical NAND strings, face challenges in achieving high density and efficient manufacturing processes, particularly in forming monolithic memory arrays with multiple levels above a single substrate without intervening substrates.
Innovation Solution
A monolithic three-dimensional NAND memory device is developed, comprising a stack of alternating insulator and electrically conductive layers over a substrate, with memory openings and blocking dielectric portions made of dielectric metal oxide, allowing for selective deposition and formation of electrically conductive layers within backside recesses, enabling efficient fabrication of memory stack structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional three-dimensional memory structures are used, then manufacturing processes become complex and less efficient, but achieving high density and multiple memory levels above a single substrate is required
Solution Approach 1:
The memory structure is segmented into distinct functional layers including alternating insulator layers and electrically conductive layers, with blocking dielectric portions selectively formed at specific locations. This segmentation allows for modular manufacturing and simplifies the overall fabrication process while achieving high-density three-dimensional memory structures with multiple levels above a single substrate
Solution Approach 2:
The patent transitions from planar two-dimensional memory structures to vertical three-dimensional structures by stacking multiple memory levels above a single substrate. The blocking dielectric portions are positioned at specific vertical locations to enable this dimensional transition, allowing current to flow vertically through multiple stacked memory cells, thereby increasing storage capacity without expanding the footprint
2Manufacturing precision
If blocking dielectric portions are formed to enable selective deposition, then manufacturing precision is improved, but the process requires selective deposition techniques
Solution Approach 1:
Blocking dielectric portions serve as intermediary structures that enable selective deposition of subsequent layers. These dielectric portions are formed at specific locations between the memory film and electrically conductive layers, acting as masks or barriers that control where materials are deposited. This intermediary structure allows for precise formation of three-dimensional memory cells while maintaining ease of manufacture through standard deposition techniques
Solution Approach 2:
The blocking dielectric portions are formed in advance before the final deposition of electrically conductive layers. This preliminary action establishes the structural framework and deposition patterns needed for subsequent manufacturing steps, ensuring that materials are deposited only in the desired locations with high precision while simplifying the overall manufacturing process
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the creation of high-density memory devices with improved manufacturing efficiency, allowing for multiple memory levels to be formed directly on a single substrate, enhancing storage capacity and operational performance.
Implementation Method 1
A plurality of blocking dielectric portions comprising a dielectric metal oxide is formed between the memory film and the respective material layers by a selective deposition process
Data Source
AI summary
A plurality of blocking dielectric portions can be formed between a memory stack structure and an alternating stack of first material layers and second material layers by selective deposition of a dielectric material layer. The plurality of blocking dielectric portions can be formed after removal of the second material layers selective to the first material layers by depositing a dielectric material on surfaces of the memory stack structure while avoiding deposition on surfaces of the first material layers. A deposition inhibitor material layer or a deposition promoter material layer can be optionally employed. Alternatively, the plurality of blocking dielectric portions can be formed on surfaces of the second material layers while avoiding deposition on surfaces of the first material layers after formation of the memory opening and prior to formation of the memory stack structure. The plurality of blocking dielectric portions are vertically spaced annular structures.