Selective Body Reset for 3D NAND Memory
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Solution Overview
Problem
3D NAND flash memory devices face challenges with threshold voltage instability and cell state-width degradation due to the existing body reset schemes, which lead to program disturbance and limited window expansion for memory states.
Innovation Solution
A modified body reset operation is implemented, where the selected and unselected wordlines are controlled separately with different voltage levels to stabilize the pillar potential, reducing threshold voltage instability and mitigating cell state-width degradation by selectively applying voltages during program and verify operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a traditional body reset scheme is applied to 3D NAND flash memory, then the memory device can operate, but threshold voltage instability and cell state-width degradation occur due to program disturbance
Solution Approach 1:
The patent segments the body reset operation into two distinct phases: a first body reset operation performed before programming to prepare the memory block, and a second body reset operation performed after programming to stabilize the threshold voltage. This segmentation allows each operation to be optimized independently, reducing program disturbance and preventing threshold voltage instability that would occur with a single undifferentiated reset scheme.
Solution Approach 2:
The first body reset operation is performed as a preliminary action before programming begins. This preliminary reset prepares the memory block by establishing appropriate initial conditions, ensuring that subsequent programming operations do not cause excessive program disturbance or threshold voltage instability in adjacent cells.
2Reliability
If body reset operations are performed to stabilize pillar potential, then threshold voltage instability is reduced, but cell state-width degradation may occur
Solution Approach 1:
The patent implements dynamic control of the body reset operations by adjusting voltage levels and timing based on the programming state. The first body reset uses different voltage parameters than the second body reset, allowing the system to adapt to different operational phases. This dynamic approach stabilizes threshold voltage while preserving cell state-width by optimizing the reset conditions for each specific phase.
Solution Approach 2:
The patent changes key parameters of the body reset operation, including voltage levels and timing sequences, between the first and second body reset operations. By modifying these parameters appropriately for each phase, the system achieves threshold voltage stabilization without causing cell state-width degradation that would result from using fixed, suboptimal parameters throughout the entire operation sequence.
3Reliability
If voltage levels are applied to selected and unselected wordlines during body reset, then program disturbance is mitigated, but device complexity increases
Solution Approach 1:
The patent segments wordline voltage control into distinct groups: selected wordlines that require specific voltage levels during programming, and unselected wordlines that receive different voltage levels to prevent program disturbance. This segmentation is implemented in a systematic manner that, while adding control steps, provides clear structure and reduces the complexity of managing all wordlines uniformly.
Solution Approach 2:
The patent applies different voltage qualities to different wordline locations based on their selection status. Selected wordlines receive voltages optimized for programming operations, while unselected wordlines receive voltages optimized for protection against disturbance. This local differentiation of voltage quality mitigates program disturbance while maintaining manageable device complexity through localized control strategies.
Data Source
AI summary
Technology for a memory device is described. The memory device can include a plurality of memory cells and a memory controller. The memory controller can apply a first voltage level to a selected wordline associated with the plurality of memory cells during a body reset operation. The memory controller can apply a second voltage level to an unselected wordline associated with the plurality of memory cells during the body reset operation. The selected wordline can transit to a stable negative pillar potential, such that selected memory cells associated with the selected wordline can have a reduced threshold voltage instability.