Selective Column Pre-Charging in Memory Circuits
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional read-only memory circuits consume excessive power due to pre-charging all column lines during data access, regardless of whether a memory cell is accessed, leading to inefficient power usage.
Innovation Solution
A memory circuit with a column pre-decoder and multiplex module that selectively pre-charges only the column line of the targeted memory cell based on decoding results, integrating pre-charge and multiplexing mechanisms to reduce unnecessary power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If all column lines are pre-charged during data access, then reliable data reading is ensured, but power consumption increases significantly
Solution Approach 1:
The patent divides the column lines into multiple groups and applies selective pre-charging only to the specific column line group that contains the accessed memory cell, rather than pre-charging all column lines. This segmentation approach maintains reliable data reading for the accessed cell while avoiding unnecessary power consumption on other column lines.
Solution Approach 2:
The patent implements different pre-charging states for different column lines based on whether they are selected for access. The pre-charging operation is applied locally only to the selected column line group, while other column lines remain in a high-impedance state, creating local quality differentiation that reduces overall power consumption.
2Use of energy by moving object
If selective pre-charging is implemented based on decoding results, then power consumption is reduced, but circuit complexity increases
Solution Approach 1:
The patent merges the pre-charge control logic with the existing column decoding logic. The pre-charging operation is integrated into the column selection process, where the same decoding signals that identify the selected column line are also used to control the pre-charge transistors, eliminating the need for separate pre-charge control circuits.
Solution Approach 2:
The decoding circuit serves multiple functions: it not only identifies the selected column line for data access but also simultaneously controls the pre-charging operation. This multi-functionality reduces the need for additional dedicated pre-charge control logic, thereby limiting the increase in circuit complexity.
Data Source
AI summary
In a memory circuit, memory cells are arranged in a matrix by “row line-and column line” (may also denoted as “word line and bit line”). The invention provides a memory circuit and related method capable for independently pre-charging the column lines or bit lines selectively during data accessing according to results of column pre-decoding to decrease the pre-charging power consumption. After pre-charging, the objective memory cell is enabled to change or not to change the corresponding electric level of the connected column line according to the stored data, and a sense amplifier detects the stored data by measuring the electric level of the column line.