Selective ECC for DRAM Weak Cell Rows
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Solution Overview
Problem
Dynamic Random Access Memory (DRAM) cells exhibit cell-to-cell variation in retention times, leading to weak cells that affect yield, refresh interval, and cause single bit errors, with existing error correcting code (ECC) solutions being costly and wasteful when applied universally.
Innovation Solution
Implementing selective ECC and partial-row replacement in DRAM, where ECC is applied only to rows with known weak cells, with ECC bits stored within the DRAM array, and defective rows or columns are replaced with spare ones, managed by control circuitry based on defect nature and availability of resources.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ECC is applied universally to all DRAM rows, then single bit errors are corrected and yield is improved, but resource allocation becomes wasteful and cost increases
Solution Approach 1:
The patent applies ECC selectively only to specific rows containing weak cells rather than universally to all rows. The system identifies rows with retention time issues and applies ECC protection only to those locations, making the quality of error protection local rather than uniform across the entire memory array.
Solution Approach 2:
The patent segments the DRAM array into rows that require ECC protection and rows that do not. By dividing the memory space based on actual weak cell locations, the system applies error correction only where needed, avoiding wasteful resource allocation to rows that already meet retention specifications.
2Reliability
If ECC is applied to all DRAM rows, then single bit errors are corrected, but power consumption increases due to unnecessary resource allocation
Solution Approach 1:
The patent implements local quality by enabling ECC functionality only in specific rows where weak cells are detected. Rows without retention issues have ECC disabled, eliminating unnecessary power consumption from redundant error correction operations in healthy memory regions.
Solution Approach 2:
The patent applies partial action by implementing ECC only to the extent necessary - specifically to rows containing weak cells - rather than applying excessive ECC protection to all rows. This partial application of error correction minimizes power consumption while maintaining reliability where actually needed.
3Reliability
If universal ECC is implemented, then yield is improved through error correction, but device complexity and cost increase
Solution Approach 1:
The patent reduces device complexity by implementing ECC locally only where required. The system includes control circuitry that identifies weak cell rows and selectively enables ECC for those specific rows, avoiding the complexity of universal ECC implementation across the entire DRAM array.
Solution Approach 2:
The patent introduces dynamic control of ECC functionality through control circuitry that can enable or disable ECC on a per-row basis. This dynamic approach allows the system to adapt ECC protection to actual weak cell locations, reducing overall system complexity compared to static universal ECC implementation.
Data Source
AI summary
A dynamic random access memory (DRAM) array is configured for selective repair and error correction of a subset of the array. Error-correcting code (ECC) is provided to a selected subset of the array to protect a row or partial row of memory cells where one or more weak memory cells are detected. By adding a sense amplifier stripe to the edge of the memory array, the adjacent edge segment of the array is employed to store ECC information associated with the protected subsets of the array. Bit replacement is also applied to defective memory cells. By implementing ECC selectively rather than to the entire array, integrity of the memory array is maintained at minimal cost to the array in terms of area and energy consumption.