Selective Etch-Back for Uniform SiGe Stressors in MOS Devices
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Solution Overview
Problem
The formation of SiGe stressors in MOS devices is affected by pattern-loading effects, resulting in varying heights and non-uniform profiles across different device regions, which complicates subsequent process steps and affects device performance.
Innovation Solution
A selective etch-back process is performed using a combination of growth and etching gases to adjust the epitaxial growth and etch rates, allowing for the reduction of pattern-loading effects and achieving more uniform epitaxy region formation, with the etch-back rate exceeding the growth rate to level the SiGe stressors and improve their profile.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If SiGe stressors are grown epitaxially in recesses to apply compressive stress to PMOS channel regions, then carrier mobility is improved, but pattern-loading effects cause non-uniform growth rates and varying heights across different device regions
Solution Approach 1:
The patent changes the chemical composition of process gases during epitaxial growth, specifically adjusting the ratio of germane to silane and adding etching gases like HCl. By controlling these parameter changes, the patent achieves selective etching that compensates for pattern-loading effects and produces uniform SiGe stressor heights across different device regions while maintaining the compressive stress necessary for improved carrier mobility
Solution Approach 2:
The patent employs periodic alternation between growth conditions and etching conditions during the epitaxial process. By cycling through different gas compositions and processing conditions, the patent achieves uniform SiGe stressor formation across regions with different pattern densities, resolving the non-uniformity caused by pattern-loading effects while preserving the stress-induced carrier mobility enhancement
2Stress or pressure
If SiGe regions are grown faster in high pattern density regions due to pattern loading effect, then compressive stress is applied to channel regions, but pyramid top portions form with non-flat surfaces that complicate subsequent processing
Solution Approach 1:
The patent modifies process gas parameters by introducing etching gases (e.g., HCl) alongside growth gases, and by adjusting the partial pressures and flow rates of these gases. This parameter change enables selective removal of excess SiGe material from high-pattern-density regions, producing flat top surfaces that facilitate subsequent source and drain silicide formation while maintaining the necessary compressive stress in channel regions
Solution Approach 2:
The patent converts the harmful pyramid-shaped protrusions caused by accelerated growth in high pattern density regions into a benefit by using controlled etching. The etching process selectively removes the excess material that forms pyramids, transforming the manufacturing complication into an opportunity to achieve uniform, flat surfaces that simplify subsequent processing steps while preserving the stressor function
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The selective etch-back process results in more uniform and flat top surfaces of SiGe stressors, reducing pattern-loading effects and improving the profiles of epitaxy regions, thereby simplifying subsequent device fabrication processes and enhancing device performance.
Implementation Method 1
performing a selective epitaxial growth to grow a semiconductor material in the recess to form an epitaxy region
Implementation Method 2
a selective etch-back is performed to the epitaxy region. The selective etch-back is performed using process gases comprising a first gas for growing the semiconductor material, and a second gas for etching the epitaxy region
Data Source
AI summary
A method for forming a semiconductor structure includes forming a gate stack over a semiconductor substrate; forming a recess in the semiconductor substrate and adjacent the gate stack; and performing a selective epitaxial growth to grow a semiconductor material in the recess to form an epitaxy region. After the step of performing the selective epitaxial growth, a selective etch-back is performed to the epitaxy region. The selective etch-back is performed using process gases comprising a first gas for growing the semiconductor material, and a second gas for etching the epitaxy region.