Solid-State Devices TRIZ Cases

Epitaxial vertical semiconductor channels increase on-current to enable vertical scaling of three-dimensional memory devices.

A holographic optical element display generates virtual images behind a screen using discrete wavelength light sources.

A composite buffer layer between the cathode and electron transporting unit enhances electron injection efficiency in organic light emitting diodes.

Calculating microlens shifts via Snell's law prevents color and luminance shading while reducing design time across different optical systems.

High aspect ratio voltage rails reduce standard cell circuit area at 10 nm nodes by maintaining resistance despite metal line scaling constraints.

Etching scribe lines removes brittle low-k dielectric material, preventing cracking and peeling during subsequent mechanical separation.

Replacing conductive vias with direct magnetic tunnel junction stacks eliminates height mismatch issues between metallization layers and memory devices.

A semiconductor device uses a block separator to divide memory block stacks into stable segments.

A shield unit overlaps the data line to decrease parasitic capacitance in organic light emitting display devices.

A compensation structure on the substrate opposing surface neutralizes mechanical tensions to enable thicker dielectric layers.

A detection layer changes color when contacted by the organic thin film encapsulation layer.

A fluorine-containing layer confines organic emitting layers within pixel regions to prevent lateral diffusion.

Biasing selector transistors before erasing prevents electron tunneling into isolation oxides, maintaining data accuracy in high-density arrays.

Parallel grooves in a plate guide workpieces into precise alignment, preventing scattering during transfer to adhesive tape.

A dual-host organic electroluminescence element combines tetracyclic heterocyclic compounds with carbazole derivatives to boost luminescent efficiency.

An electrochromic layer controls reflectance of externally incident light, resolving low contrast ratios caused by uncontrolled reflection during image display.

An organic charge transport layer mixes an electret material to lower its refractive index while maintaining electrical conductivity.

A semiconductor light emitting device uses non-conductive reflective films to reflect light from the active layer.

A data line with distinct signal and diverting paths routes static electricity away from pixel units in image sensors.

Spacers on the second substrate define a gap facing the connection circuit board, intercepting moisture seepage that damages TAB-mounted components.

A flexible display panel design positions the first wire changing layer on an organic insulation surface to extend into a combination insulation layer.

A peak-shaped bottom electrode concentrates the electric field to facilitate conductive path formation in resistive-switching memory devices.

A cyclometallated complex layer between the cathode and light emitting layer reduces drive voltage in organic electroluminescent devices.

Stacking a low-mobility IGZO base with high-mobility IGZYO or IGTO layers raises GOA TFT carrier mobility to 30.2 cm2/Vs while maintaining stability.

Oxidizing a metal silicide layer creates a composite switching material that resolves manufacturing precision versus fabrication complexity trade-offs.

Segmented laser irradiation and stress control suppress crack propagation during glass substrate cutting, ensuring high reliability.

Detection capacitors with amorphous silicon electrodes integrate into thin film transistor arrays to detect touch locations via capacitance variation.

A copolymer hole injection layer enhances charge mobility through solution processability and structural integrity.

Solid state lighting devices use specific lumiphoric materials to generate aggregated emissions with warm correlated color temperatures.

Selective etch-back levels SiGe stressor surfaces via combined growth and etching gases, reducing pattern-loading effects.

Vertical multi-layer routing lowers interconnect resistance and RC time constants, enabling faster data reading speeds.

Concave arc metal shields redirect stray light to active pixels while blocking black reference sensors, boosting quantum efficiency.

Segmenting pixel arrays into cells with asymmetric connection parts reduces micro-bump fabrication difficulty while maintaining electrical reliability.

Omitting epitaxial layers in n-type tap regions prevents short circuits and breakdown voltage degradation while maintaining transistor characteristics.

Liquid phase deposition of indium halogen alkoxides resolves colloidal instability and poor electrical properties by enabling precise layer control.

A light-emitting diode structure dopes fluorescent powders directly into the semiconductor layer or arranges them on the emitting surface without package gel.

A porous III-nitride buffer layer relaxes lattice strain between substrates and light emitting layers.

Segmented shared bit lines and 3D checkerboard contacts reduce contact resistance and power consumption while relaxing array pitch constraints.

Concomitant polymerization eliminates surfactants and multi-step processing to produce stable PEDOT-(co)-polymer-electrolyte composites.

Segmented sealed cavities isolate filling adhesive dispensing, preventing overflow and ensuring uniform filler distribution across OLED units.

Sacrificial spin-on glass mediates deep hole etching to resolve profile non-uniformity and irregularities in vertical channel formation.

Segmented dual-sided LED chips on a flexible substrate distribute thermal load while wireless circuits enable customizable light mixing for decorative bulbs.

Rear-side metallic vias connect semiconductor photodetectors to printed circuit boards in optical scanning units.

Asymmetric drain and source selection transistor counts reduce leakage current in three-dimensional semiconductor memory arrays.

Segmenting the planarizing layer reduces wiring resistance while minimizing gas outgassing that causes cathode oxidation and pixel shrinkage.

Positioning spacers in non-pixel areas improves substrate rigidity against external shocks while minimizing light reflection that degrades image quality.

A reinforced vertical-NAND structure uses interleaved oxide and nitride layers with a mechanical reinforcing layer to enhance structural integrity.

A multilayer RRAM circuit maps resistance values across arrays to generate unique physical unclonable function outputs.

Segmenting the gate insulation layer into different thicknesses increases storage capacitance while avoiding etching defects in oxide semiconductor transistors.

Distinct initialization voltages for drive transistor gates and organic EL anodes suppress bright spots and black floating in display devices.