SOI Semiconductor Device Selective Epitaxial Layer Formation
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Solution Overview
Problem
The reliability of semiconductor devices using SOI substrates is compromised due to short circuits and breakdown voltage degradation caused by the formation of epitaxial layers in tap regions, leading to increased device area and reduced reliability.
Innovation Solution
The semiconductor device design omits epitaxial layers in n-type tap regions and forms them only in p-type tap regions, ensuring proper spacing and reducing the aspect ratio of plug electrodes, thereby preventing short circuits and breakdown voltage degradation while maintaining device efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If epitaxial layers are formed in both n-type and p-type tap regions, then transistor characteristics are improved, but short circuits and breakdown voltage degradation occur
Solution Approach 1:
The patent applies local quality by forming epitaxial layers selectively only in p-type tap regions while omitting them in n-type tap regions. This localized approach allows the device to benefit from epitaxial layer formation where it improves transistor characteristics without introducing the harmful short circuit effects that occur when epitaxial layers are formed in n-type regions. The selective formation based on local region requirements resolves the contradiction between improving transistor characteristics and preventing short circuits.
2Reliability
If epitaxial layers are formed in tap regions, then transistor characteristics are improved, but device area increases
Solution Approach 1:
The patent reduces device area by applying local quality principles - forming epitaxial layers only in p-type tap regions where they are needed for improving transistor characteristics, rather than forming them uniformly across all tap regions. This selective formation eliminates unnecessary epitaxial layers in n-type regions, thereby reducing the overall device area while maintaining the beneficial transistor characteristics in the regions where epitaxial layers are formed.
3Area of stationary object
If plug electrodes are formed with small spacing, then device area is reduced, but aspect ratio increases leading to manufacturing difficulty
Solution Approach 1:
The patent addresses the aspect ratio issue by applying local quality - forming epitaxial layers selectively in p-type tap regions to provide proper spacing and reduce plug electrode aspect ratios where needed. This localized formation allows for optimized plug electrode dimensions in specific regions, reducing manufacturing difficulty associated with high aspect ratios while still achieving compact device area through selective rather than universal epitaxial layer formation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances the reliability of semiconductor devices by preventing short circuits and breakdown voltage issues, while also reducing the device area and improving transistor characteristics.
Implementation Method 1
first epitaxial layers formed on the first semiconductor layer at both sides of the first gate electrode
Data Source
AI summary
Reliability of a semiconductor device is improved. A p-type MISFET of a thin film SOI type is formed in an SOI substrate including a semiconductor substrate, an insulating layer on the semiconductor substrate, and a semiconductor layer on the insulating layer, and n+-type semiconductor regions which are source and drain region of the p-type MISFET are formed in the semiconductor layer and an epitaxial layer on the semiconductor layer. A semiconductor layer is formed via the insulating layer below the p-type MISFET formed in the n-type well region of the semiconductor substrate. In an n-type tap region which is a power supply region of the n-type well region, a silicide layer is formed on a main surface of the n-type well region without interposing the epitaxial layer therebetween.