Computation Processing With Selective Memory Power Gating
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The computation processing devices for convolutional neural networks face significant power consumption issues due to massive sum-of-product computations, which is particularly problematic in end devices like robots, vehicles, or mobile terminals.
Innovation Solution
A computation processing device with a memory unit that includes a non-volatile storage region and a computation circuit unit, along with a power gate unit that blocks power supply to unused memory cells during computation, reducing power consumption by retaining only necessary data in a non-volatile storage region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If all memory cells in the non-volatile storage region are kept powered on to retain computation data, then data availability for computation is ensured, but power consumption increases
Solution Approach 1:
The non-volatile storage region is divided into multiple memory blocks, and power gating is applied selectively to individual blocks or groups of blocks. This segmentation allows the system to power on only the specific memory blocks containing computation data needed for current operations, while keeping other blocks powered off, thereby reducing overall power consumption while maintaining data availability for active computation.
Solution Approach 2:
The power gating configuration is dynamically adjusted based on computation requirements. The control circuit determines which memory blocks need to be powered on at any given time based on the computation data being processed, enabling flexible power management that adapts to changing computational needs while ensuring data availability when required.
2Speed
If computation data is retained in volatile memory for fast access, then computation speed improves, but power consumption increases due to continuous power supply requirements
Solution Approach 1:
Computation data is pre-loaded from the non-volatile storage region into the volatile memory or computation circuit unit before actual computation operations begin. This preliminary action ensures that when computation starts, all necessary data is already in fast-access memory, enabling high-speed computation without requiring continuous power supply to large amounts of storage memory during the computation process.
3Reliability
If the non-volatile storage region is fully utilized to store all computation data, then data retention capability improves, but access time for specific data increases
Solution Approach 1:
The non-volatile storage region is segmented into multiple memory blocks, allowing selective powering on of specific blocks containing needed computation data. This segmentation enables the system to maintain comprehensive data retention capability across all blocks while reducing access time by only activating and accessing relevant blocks rather than searching through the entire storage region.
Solution Approach 2:
The system performs preliminary identification of which memory blocks contain the computation data needed for upcoming operations, and pre-activates only those specific blocks before computation begins. This preliminary action reduces access time by avoiding the need to search through or activate the entire non-volatile storage region, while still maintaining the ability to retain all data across the full storage capacity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces power consumption by blocking power supply to unused memory cells, thereby optimizing power usage in convolutional neural network computations.
Implementation Method 1
a power gate unit that blocks power supply to a part or all of memory cells other than memory cells storing a part or all of the computation data input to the computation circuit unit in the computation processing when performing the computation processing, in the non-volatile storage region
Data Source
AI summary
A computation processing device includes: a memory unit that retains computation data for weighting computation, and at least a part of which is a non-volatile storage region; a computation circuit unit that performs computation processing including the weighting computation by using a part or all of the computation data input from the memory unit; and a power gate unit that blocks power supply to a part or all of memory cells other than memory cells storing a part or all of the computation data input to the computation circuit unit in the computation processing when performing the computation processing, in the non-volatile storage region.


