Selective Metallization of IC Substrates via Laser-Activated Catalysts

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Solution Overview

Problem

Conventional electroless copper deposition techniques face challenges in achieving precise copper feature deposition near existing copper features as circuit dimensions shrink, requiring improved selective metallization methods for integrated circuit substrates.

Innovation Solution

The method involves dispersing catalytic particles, such as cubic-shaped metal nanocrystals, within a dielectric material on the IC substrate, followed by laser ablation to activate these particles, allowing for selective electroless deposition of copper by exposing the substrate to an electroless solution, thereby enabling precise patterning and deposition where needed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional electroless copper deposition is used, then copper features can be deposited, but the precision and selectivity are insufficient for closely spaced copper features

Engineering Contradiction:
Improvecopper feature deposition precisionVSAvoidmetallization process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

Catalytic particles are embedded in the dielectric material before the electroless deposition process. This preliminary placement of catalysts enables selective copper deposition only in desired locations when exposed to electroless solution, achieving precise patterning without complex masking steps

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The dielectric material contains catalytic particles distributed at specific locations where copper deposition is desired. This creates local catalytic activity only in those regions, enabling selective metallization with high precision for closely spaced features while maintaining simplicity in the overall process

Inventive Principle:
Principle #3Local quality

2Quantity of substance

If circuit dimensions are shrunk to increase density, then more features can be packed, but selective deposition near existing copper features becomes more difficult

Engineering Contradiction:
Improvecircuit feature densityVSAvoidselective deposition precision
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

Catalytic particles are pre-embedded in the dielectric material at precise locations before any deposition occurs. This preliminary positioning enables subsequent selective copper deposition even at reduced feature sizes, maintaining deposition precision while allowing higher feature density

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

By distributing catalytic particles locally at specific sites within the dielectric, the process achieves high-selectivity deposition suitable for densely packed circuits. Each catalytic particle acts as a localized nucleation site, enabling precise control of copper feature placement at smaller dimensions

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables precise and selective copper deposition, enhancing the ability to create intricate copper features close to existing copper features, improving the density and precision of circuitry on integrated circuit substrates.

Implementation Method 1

exposing the dielectric material and the catalytic particles to laser light to simultaneously form a recess in the dielectric material and activate catalytic action of the catalytic particles

Methodology Applied
Scientific EffectLaser ablation: Laser Ablation

Implementation Method 2

The activated substrate may then be exposed to a solution of the desired metal and reducing agent, resulting in deposition in areas with the catalyst

Methodology Applied
Scientific EffectCatalysis: Catalysis

Data Source

PatentEP3268985B1Selective metallization of an integrated circuit (IC) substrate
Publication Date: 2021.05.19 INTEL CORP
  • EP3268985B1 patent drawingFigure 1~2
  • EP3268985B1 patent drawingFigure 3~4
  • EP3268985B1 patent drawingFigure 5~6

AI summary

Embodiments of the present disclosure describe selective metallization of an integrated circuit (IC) substrate. In one embodiment, an integrated circuit (IC) substrate may include a dielectric material and metal crystals having a polyhedral shape dispersed in the dielectric material and bonded with a ligand that is to ablate when exposed to laser light such that the metal crystals having the ablated ligand are activated to provide a catalyst for selective electroless deposition of a metal. Other embodiments may be described and/or claimed