Selective Repair Masking for Embedded Memory Yield
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The increasing complexity of integrated circuit (IC) designs, particularly in systems on a chip (SOC), makes it challenging to achieve high fault coverage in embedded memory testing while minimizing test cost and chip area overhead, and traditional testing paradigms struggle to incorporate effective repair methodologies to achieve profitable yield levels.
Innovation Solution
A method and circuit for selectively repairing embedded memory modules in IC chips, which involves performing tests to identify non-operational memory elements, generating repair solutions, and storing them in non-volatile storage, with a repair mask register to selectively restore a subset of these solutions based on masking bits, allowing for flexible and efficient on-chip repair.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional testing paradigms are used to test embedded memory, then testing can be performed, but high fault coverage cannot be achieved while minimizing test cost and chip area overhead
Solution Approach 1:
The patent divides the memory testing process into multiple passes, where each pass tests a specific subset of memory elements or applies a specific test pattern. This segmentation allows the system to achieve comprehensive fault coverage by systematically working through different test scenarios without requiring all tests to run simultaneously, thereby reducing the complexity overhead.
Solution Approach 2:
The patent implements a dynamic repair methodology where the testing and repair process adapts based on identified defects. The system can selectively apply repairs to specific memory elements based on test results, allowing the testing paradigm to dynamically adjust and optimize the balance between fault coverage and resource consumption.
2Ease of repair
If multiple repair solutions are generated for non-operational memory elements, then repair options increase, but chip area overhead increases due to storage requirements
Solution Approach 1:
The patent extracts and stores only the essential repair information in non-volatile memory elements, such as fuse arrays. Instead of storing complete repair solutions for all memory elements, the system extracts only the necessary repair data and stores it in a compact format, significantly reducing the chip area required while maintaining multiple repair options.
Solution Approach 2:
The patent uses fuse arrays to create a compact copy of repair information. The fuse array stores a condensed representation of repair solutions, allowing the system to access multiple repair options without requiring full copies of all memory element data, thus reducing overall chip area overhead.
3Reliability
If all repair solutions are restored, then maximum repair coverage is achieved, but unnecessary repairs increase complexity and cost
Solution Approach 1:
The patent applies local quality by selectively restoring repair solutions based on specific criteria or conditions. Instead of uniformly restoring all repair solutions, the system evaluates each repair option and applies only those that are necessary and appropriate for the specific defect identified, thereby achieving high repair coverage while avoiding unnecessary repairs.
Solution Approach 2:
The patent changes parameters such as repair selection criteria, restoration conditions, and application thresholds to optimize the balance between repair coverage and complexity. By adjusting these parameters dynamically based on test results and chip conditions, the system achieves maximum repair coverage only when necessary, reducing overall complexity.
Data Source
AI summary
The present invention relates to a method and circuit for selectively repairing an embedded memory module having memory elements in an integrated circuit chip. The method includes performing a plurality of tests on the embedded memory module under operating conditions to identify a plurality of non-operational memory elements in the embedded memory module and, in response to identifying the non-operational memory elements, generating a plurality of corresponding repair solutions. The method further includes storing the plurality of corresponding repair solutions in a non-volatile storage element and determining from a mask a subset of the plurality of repair solutions that should be restored.