Selective Save Registers for Persistent Memory Data Persistence
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Solution Overview
Problem
Existing NVDIMM memory systems perform inefficient save operations by copying all volatile data to non-volatile memory, leading to resource wastage, reduced battery life, and unequal prioritization of data persistency, as they treat all data equally without considering criticality.
Innovation Solution
Implementing targeted save registers within the persistent memory system that allow for selective save operations based on data criticality, battery capacity, and memory health, enabling dynamic configuration of save operations to prioritize critical data and optimize resource use.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If all volatile data is copied to non-volatile memory during save operations, then data persistence is ensured, but resource usage increases and battery life decreases
Solution Approach 1:
The patent divides the volatile memory space into multiple regions, each with its own save register indicating whether save operations should be performed. This segmentation allows selective saving of only critical data regions, reducing energy consumption while maintaining persistence for important data.
Solution Approach 2:
Different regions of volatile memory are assigned different save priorities based on data criticality. The save registers provide local control, allowing each memory region to have customized save behavior, ensuring critical data is preserved while non-critical data consumes no save operation resources.
2Reliability
If all volatile data is copied to non-volatile memory during save operations, then data persistence is ensured, but processing resources are wasted
Solution Approach 1:
The volatile memory is segmented into multiple regions with individual save registers. The memory controller processes save operations by checking each region's save register, enabling selective saving that improves processing efficiency by avoiding unnecessary copy operations for non-critical data regions.
Solution Approach 2:
Instead of performing complete save operations on all volatile memory, the system performs partial save operations only on regions marked as critical in their save registers. This partial action approach maintains data persistence for essential data while significantly reducing processing overhead.
3Reliability
If save operations are performed on all data, then data persistence is ensured, but non-volatile memory wear increases
Solution Approach 1:
By segmenting volatile memory into regions with individual save registers, the system can identify and save only critical data regions. This reduces the frequency and volume of write operations to non-volatile memory, thereby reducing wear and extending device lifespan while maintaining persistence for essential data.
Solution Approach 2:
Each memory region is assigned a save priority based on data criticality, creating local quality differences. Critical regions trigger save operations that protect device life through selective writing, while non-critical regions do not contribute to non-volatile memory wear.
4Device complexity
If all data is treated equally during save operations, then simplicity is maintained, but data criticality prioritization is lost
Solution Approach 1:
The patent introduces a simple yet effective segmentation mechanism using save registers for each volatile memory region. Each register contains a save indicator that provides explicit prioritization information, enabling the memory controller to distinguish critical from non-critical data without complex analysis.
Solution Approach 2:
The system changes the parameter of data prioritization by introducing save registers that explicitly mark critical regions. This parameter change transforms the save operation from treating all data equally to selectively saving based on the save indicator parameter, achieving prioritization with minimal added complexity.
Data Source
AI summary
In accordance with embodiments of the present disclosure, an information handling system may include a processor and a persistent memory system communicatively coupled to the processor, the persistent memory system comprising one or more persistent memory modules and a plurality of targeted save registers, each targeted save register associated with a respective portion of the persistent memory system, and each targeted save register having a value indicative of how save operations from volatile memory to non-volatile memory of the persistent memory system are to be performed with respect to the respective portion of the persistent memory system.