Non-linear Selector Device for Resistive Memory Leakage
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Solution Overview
Problem
Resistive memory technologies face challenges in achieving high memory density while minimizing leakage current and power consumption, as traditional approaches often result in increased power consumption and reduced sensing margin due to the connection of multiple memory cells to common conductive lines, leading to electrical issues like leakage current and joule heating.
Innovation Solution
A selector device with a non-linear current-voltage (I-V) response is integrated with a two-terminal memory cell, providing a monolithic solid state construct that mitigates leakage current and allows for high memory density without significantly increasing the size of the memory cell, enabling a 1 transistor-n resistor (1T-nR) architecture with low power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple memory cells are connected to common conductive lines to increase memory density, then memory density is improved, but leakage current and power consumption increase
Solution Approach 1:
A selector device is introduced as an intermediary component between the memory cell and the common conductive lines. This selector device remains in a non-conductive state during standby, blocking leakage current from flowing through the memory cell, while allowing legitimate read/write operations when activated. This resolves the contradiction by enabling high memory density through common conductive lines without suffering from the associated leakage current penalties.
2Quantity of substance
If multiple memory cells are connected to common conductive lines to increase memory density, then memory density is improved, but sensing margin is reduced
Solution Approach 1:
The selector device acts as an electrical intermediary that provides high impedance during standby and low impedance during active operations. This switching behavior isolates the memory cell from the common conductive lines during read operations, reducing noise and interference from other cells, thereby improving the sensing margin while maintaining high memory density.
3Quantity of substance
If traditional memory architecture is used to achieve high memory density, then memory density is improved, but power consumption increases
Solution Approach 1:
The selector device operates in a periodic manner, switching between non-conductive (standby) and conductive (active) states. During standby periods, it blocks current flow to minimize power consumption. During active periods, it enables current flow for read/write operations. This periodic switching allows high memory density architecture to achieve low average power consumption by ensuring current flows only when necessary.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The selector device effectively reduces leakage current and power consumption, enabling high memory densities with improved sensing margins by providing a non-linear I-V response, facilitating a 1T-nR architecture with large values of n (e.g., 512, 1024) without significant impact on leakage current.
Implementation Method 1
The selector device can be configured to have a non-linear current-voltage (I-V) relationship
Implementation Method 2
the selector material is configured to allow the conductive ions to permeate within the layer of selector material in response to the voltage applied across the first layer structure and the second layer structure
Implementation Method 3
field-assisted diffusion of atoms can occur in response to a suitable electric potential applied to a resistive memory cell
Implementation Method 4
formation of the conductive filament can occur in response to joule heating and electrochemical processes in binary oxides
Data Source
AI summary
Disclosed is a solid state memory having a non-linear current-voltage (I-V) response. By way of example, the solid state memory can be used as a selector device. The selector device can be formed in series with a nonvolatile memory device via a monolithic fabrication process. Further, the selector device can provide a substantially non-linear I-V response suitable to mitigate leakage current for the nonvolatile memory device. In various disclosed embodiments, the series combination of the selector device and the non-volatile memory device can serve as one of a set of memory cells in a 1-transistor, many-resistor resistive memory cell array.