Via-Integrated Selector Memory Structure for Higher Density NVM

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Solution Overview

Problem

Current memory devices, such as DRAMs, lack the ability to retain data when power is cut off, while nonvolatile memory devices like MRAMs, RRAMs, and PCRAMs require larger form factors and increased area burden, limiting their integration density.

Innovation Solution

The integration of a selector in a via structure within a memory device allows for a compact one selector-one memory configuration, where the selector is surrounded by a dielectric layer, reducing the threshold voltage and enhancing substrate area efficiency for higher density devices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If nonvolatile memory devices (MRAMs, RRAMs, PCRAMs) are used to retain data without power, then data retention capability is improved, but device area increases and integration density decreases

Engineering Contradiction:
Improvedata retention capabilityVSAvoiddevice area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent combines the selector and memory components into a single integrated structure where the selector is formed within the same fabrication process as the memory device. This merging eliminates the need for separate selector structures and interconnects, achieving compact one-selector-one-memory configuration that reduces device area while maintaining nonvolatile data retention capability through the integrated capacitor structure

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The selector is nested within the via structure that also contains the bottom electrode and memory layer. The dielectric layer is nested around the selector, creating a compact configuration where multiple functional elements occupy overlapping or adjacent spatial regions. This nesting approach enables higher integration density by efficiently utilizing three-dimensional space

Inventive Principle:
Principle #7Nested doll (Nesting)

2Area of stationary object

If selector size is reduced to improve integration density, then substrate area efficiency is improved, but selector contamination risk increases

Engineering Contradiction:
Improvesubstrate area efficiencyVSAvoidselector contamination
Core Design Contradiction:
Area of stationary objectVSObject-affected harmful factors

Solution Approach 1:

A dielectric layer is introduced as an intermediary material that surrounds and isolates the selector from the surrounding environment and other device components. This dielectric barrier prevents contamination of the compact selector structure while maintaining electrical functionality, solving the problem of contamination risk associated with reduced selector size

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The dielectric layer forms a protective shell around the selector, creating a physical barrier that protects the compact structure from contamination. This thin film approach maintains the small form factor of the selector while providing necessary environmental isolation and protection

Inventive Principle:
Principle #30Flexible shells and thin films

Data Source

PatentUS11910621B2Memory device and manufacturing method thereof
Publication Date: 2024.02.20 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11910621B2 patent drawing
  • US11910621B2 patent drawing
  • US11910621B2 patent drawing

AI summary

A method for manufacturing a memory device includes forming a dielectric layer over a substrate. A bottom electrode via opening is formed in the dielectric layer. A bottom electrode is formed in the bottom electrode via opening. The bottom electrode is etched back. A selector is formed in the bottom electrode via opening and over the bottom electrode. A memory layer is formed over the selector. A top electrode is formed over the memory layer.