Self-Align Double Patterning for Sub-Lithographic Semiconductor Patterns

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Solution Overview

Problem

Conventional photolithography processes face limitations in forming fine patterns in semiconductor devices due to resolution constraints, making it difficult to achieve the required pitch reduction for high-integration devices.

Innovation Solution

A self-align double patterning method is employed, involving the formation of first and second hard mask patterns, a sacrificial layer, and a photoresist pattern to expose and etch the underlying layer, allowing for the creation of fine patterns and contact holes at resolutions below the photolithography limit.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional photolithography process is used, then manufacturing process is simple, but manufacturing precision deteriorates due to resolution limit

Engineering Contradiction:
Improvepattern formation precisionVSAvoidpatterning process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patterning process is divided into multiple discrete steps: forming first mandrel patterns, depositing sacrificial layer, forming second mandrel patterns, and selective removal. This segmentation allows each step to be optimized independently, achieving sub-lithographic precision through cumulative process control rather than relying on single-step photolithography resolution.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The sacrificial layer is deposited in advance on the first mandrel patterns before forming the second mandrel patterns. This preliminary action creates a predefined spatial framework that guides subsequent pattern formation, ensuring precise positioning of final patterns below the photolithography resolution limit through self-alignment.

Inventive Principle:
Principle #10Preliminary action

2Quantity of substance

If pitch is reduced for high-integration devices, then integration density is improved, but manufacturing precision deteriorates due to photolithography resolution limit

Engineering Contradiction:
Improveintegration densityVSAvoidpattern formation precision
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The methodology transitions from two-dimensional planar photolithography to three-dimensional self-aligned patterning using vertical mandrel structures and conformal sacrificial layer deposition. This dimensional transition enables pitch multiplication in the lateral direction while maintaining control through vertical process steps, achieving high integration density without being constrained by photolithography resolution limits.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The sacrificial layer serves as an intermediary material that mediates between the first and second mandrel patterns. It temporarily occupies the space between mandrels, defines the final pattern pitch through its thickness, and is subsequently removed to reveal the precise sub-lithographic patterns, enabling pitch reduction beyond direct photolithography capabilities.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Manufacturing precision

If self-align double patterning method is used, then manufacturing precision is improved for fine patterns, but device complexity increases

Engineering Contradiction:
Improvefine pattern formation precisionVSAvoidpatterning process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The process employs self-alignment mechanisms where the sacrificial layer automatically positions itself relative to the mandrel patterns through conformal deposition, and subsequent etching steps use the mandrels as self-aligned masks. This self-service approach eliminates the need for additional alignment operations and photolithography steps, reducing process complexity despite multiple patterning steps.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The methodology changes critical process parameters from optical resolution limits to deposition thickness control and etch selectivity. By controlling the sacrificial layer thickness through atomic layer deposition and using selective chemical etching, the process achieves precision determined by薄膜 deposition control rather than optical diffraction limits, simplifying the overall control framework.

Inventive Principle:
Principle #35Parameter changes

4Productivity

If photolithography resolution limit is accepted, then process simplicity is maintained, but productivity deteriorates due to inability to form fine patterns

Engineering Contradiction:
Improvefine pattern formation capabilityVSAvoidpatterning process complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patterning process is divided into multiple discrete steps: forming first mandrel patterns, depositing sacrificial layer, forming second mandrel patterns, and selective removal. This segmentation allows each step to be optimized independently, achieving sub-lithographic precision through cumulative process control rather than relying on single-step photolithography resolution.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The methodology changes critical process parameters from optical resolution limits to deposition thickness control and etch selectivity. By controlling the sacrificial layer thickness through atomic layer deposition and using selective chemical etching, the process achieves precision determined by薄膜 deposition control rather than optical diffraction limits, simplifying the overall control framework.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enables the formation of fine patterns and contact holes with various sizes and pitches, overcoming the resolution limitations of conventional photolithography and allowing for higher integration densities in semiconductor devices.

Implementation Method 1

The sacrificial layer may be formed by an atomic layer deposition method

Methodology Applied
Scientific EffectAtomic layer deposition: Chemical Vapour Deposition

Implementation Method 2

The isotropic etching may be wet etching

Methodology Applied
Scientific EffectWet etching:

Data Source

PatentUS7615496B2Method of forming pad patterns using self-align double patterning method, pad pattern layout formed using the same, and method of forming contact holes using self-align double patterning method
Publication Date: 2009.11.10 SAMSUNG ELECTRONICS CO LTD
  • US7615496B2 patent drawing
  • US7615496B2 patent drawing
  • US7615496B2 patent drawing

AI summary

A self-align patterning method for forming patterns includes forming a first layer on a substrate, forming a plurality of first hard mask patterns on the first layer, forming a sacrificial layer on top surfaces and sidewalls of the first hard mask patterns, thereby forming a gap between respective facing portions of the sacrificial layer on the sidewalls of the first hard mask patterns, forming a second hard mask pattern in the gap, etching the sacrificial layer using the second hard mask pattern as a mask to expose the first hard mask patterns, exposing the first layer using the exposed first hard mask patterns and the second hard mask pattern, and etching the exposed first layer using the first and second hard mask patterns.