Self-Aligned Air Gaps for Parasitic Capacitance Reduction
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Solution Overview
Problem
As semiconductor devices become more integrated, the increasing parasitic capacitance between conductive structures slows down operation speed and deteriorates refresh characteristics, and existing methods to reduce parasitic capacitance are limited by the high dielectric constants of materials like silicon oxide and silicon nitride.
Innovation Solution
The introduction of air gaps between conductive structures is achieved through the formation of sacrificial spacers and conductive layer patterns, which undergo silicidation to create self-aligned air gaps with a low dielectric constant, reducing parasitic capacitance without the need for a dip-out process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the distance between conductive structures is decreased to achieve high integration, then device integration is improved, but parasitic capacitance increases
Solution Approach 1:
The patent extracts the harmful dielectric material between conductive structures and replaces it with air gaps, effectively removing the source of high parasitic capacitance while maintaining the reduced distance between structures for high integration
Solution Approach 2:
The patent changes the dielectric constant parameter from high values (silicon oxide ~4, silicon nitride ~7) to the lowest possible value (air ~1) by forming air gaps between conductive structures, thereby reducing parasitic capacitance
2Object-generated harmful factors
If air gaps are formed between conductive structures to reduce parasitic capacitance, then parasitic capacitance is reduced, but manufacturing complexity increases
Solution Approach 1:
The patent performs preliminary actions by forming sacrificial spacers and conductive layer patterns before creating the final air gaps, which simplifies the overall manufacturing process by preparing the structure in advance
Solution Approach 2:
The patent uses sacrificial spacers as intermediary structures that temporarily occupy space and guide the formation of air gaps, making the complex process of creating precise air gaps between conductive structures more manageable
3Ease of manufacture
If conventional dielectric materials like silicon oxide or silicon nitride are used, then manufacturing is simplified, but parasitic capacitance remains high
Solution Approach 1:
The patent fundamentally changes the dielectric constant parameter from conventional materials (silicon oxide ~4, silicon nitride ~7) to air (~1) by forming air gaps, achieving the lowest possible parasitic capacitance while using standard semiconductor manufacturing processes
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The self-aligned air gaps effectively reduce parasitic capacitance, enhancing the operation speed and refresh characteristics of semiconductor devices by lowering the dielectric constant between conductive structures.
Implementation Method 1
The sacrificial spacers may include a polysilicon layer, and the conductive layer patterns may include a silicidable metal layer. The defining of the air gaps may include performing anneal and silicidating the conductive layer patterns and the sacrificial spacers.
Implementation Method 2
The defining of the air gaps may include performing anneal and silicidating the conductive layer patterns and the sacrificial spacers.
Data Source
AI summary
A method for fabricating a semiconductor device includes forming a plurality of semiconductor structures over a substrate, forming an interlayer dielectric layer over the semiconductor structures, etching the interlayer dielectric layer, and defining open parts between the semiconductor structures to expose a surface of the substrate, forming sacrificial spacers on sidewalls of the open parts, forming conductive layer patterns in the open parts, and causing the conductive layer patterns and the sacrificial spacers to reach each other, and defining air gaps on the sidewalls of the open parts.


