Self-Aligned Contact Bars and Metal Lines with Expanded Via Landing Regions
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Solution Overview
Problem
In densely packed semiconductor device regions, forming metal lines with reduced bottom critical dimensions while maintaining sufficient top critical dimensions for reliable contacting is challenging, leading to patterning-related non-uniformities and yield loss due to the need for complex lithography and etch techniques.
Innovation Solution
The formation of metal lines with a reduced bottom critical dimension and increased top critical dimension is achieved by creating a first trench portion with the desired top width and using sacrificial spacer elements to adjust the bottom width in a self-aligned manner, or by using etch masks to form trenches with locally restricted landing areas, allowing for precise control of critical dimensions and improved alignment accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If complex lithography and etch techniques are used to form metal lines with reduced bottom critical dimensions, then the bottom critical dimension is reduced, but patterning-related non-uniformities and yield loss occur
Solution Approach 1:
The metal line formation process is segmented into two distinct stages: first forming the trench with the desired top width, then using sacrificial spacer elements to define and adjust the bottom width. This segmentation allows each stage to be optimized independently, achieving reduced bottom critical dimension without compromising patterning uniformity.
Solution Approach 2:
Sacrificial spacer elements are formed in advance within the trench structure before the final metal line deposition. These pre-formed spacers serve as templates that define the bottom critical dimension, enabling precise control of the metal line geometry without requiring complex lithography and etch techniques at the critical dimension stage.
2Length of moving object
If complex lithography and etch techniques are used to form metal lines with reduced bottom critical dimensions, then the bottom critical dimension is reduced, but yield loss occurs
Solution Approach 1:
The process is divided into sequential steps where the trench formation and the bottom width definition are separated. The sacrificial spacer elements provide a robust, controllable mechanism for defining the bottom critical dimension, reducing process variability and improving yield compared to single-step complex lithography and etch approaches.
Solution Approach 2:
The sacrificial spacer elements are formed through self-aligned processes that automatically define the bottom width based on the trench geometry. This self-service mechanism reduces reliance on complex alignment procedures and minimizes yield loss associated with alignment errors in densely packed regions.
3Manufacturing precision
If self-aligned spacer elements are used to adjust bottom width, then alignment accuracy is improved, but device complexity increases
Solution Approach 1:
Sacrificial spacer elements serve as intermediary structures that mediate between the trench formation process and the final metal line deposition. These intermediaries simplify the overall process by providing a straightforward, self-aligned mechanism for controlling bottom width, reducing the need for complex multi-step lithography and etch procedures.
4Manufacturing precision
If etch masks are used to form trenches with locally restricted landing areas, then critical dimension control is improved, but device complexity increases
Solution Approach 1:
The etch mask approach applies different geometries at different locations: full-width trenches in most regions and locally restricted landing areas only where via contacting is required. This local differentiation allows precise critical dimension control at via locations without unnecessarily complicating the overall metal line formation process.
Data Source
AI summary
Disclosed herein is an illustrative semiconductor device that includes a transistor having drain and source regions and a gate electrode structure. The disclosed semiconductor device also includes a contact bar formed in a first dielectric material that connects to one of the drain and source regions and includes a first conductive material, the contact bar extending along a width direction of the transistor. Moreover, the illustrative device further includes, among other things, a conductive line formed in a second dielectric material, the conductive line including an upper portion having a top width extending along a length direction of the transistor and a lower portion having a bottom width extending along the length direction that is less than the top width of the upper portion, wherein the conductive line connects to the contact bar and includes a second conductive material that differs from the first conductive material.