Self-Aligned MIM Capacitor Spacer for Moisture and Plasma Protection

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Solution Overview

Problem

The edge of metal-insulator-metal (MIM) capacitors in integrated chips is prone to failure due to exposure to moisture and plasma damage during processing, which can lead to reliability issues and reduced yield.

Innovation Solution

A spacer made of silicon nitride is used to surround the outer sidewalls of the MIM capacitor, protecting it from moisture and plasma damage, while the upper electrode is recessed to prevent shorting and enhance reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the MIM capacitor edge is exposed during processing, then the manufacturing process is simpler, but the reliability deteriorates due to moisture and plasma damage

Engineering Contradiction:
Improvecapacitor reliabilityVSAvoiddevice structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

A spacer structure is introduced as an intermediary protective element between the harmful processing environment (moisture and plasma) and the MIM capacitor edge. The spacer acts as a physical barrier that shields the capacitor edge during manufacturing processes, preventing damage while allowing the capacitor to maintain its functional performance.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The spacer is formed in advance before the MIM capacitor undergoes plasma processing or moisture exposure. By establishing the protective spacer structure beforehand, the capacitor edge is pre-protected against anticipated harmful effects during subsequent manufacturing steps, eliminating the need for post-processing protection measures.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the upper electrode is recessed, then the reliability improves by preventing shorting, but the manufacturing precision requirements increase

Engineering Contradiction:
Improveshorting preventionVSAvoidelectrode alignment precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The spacer structure serves a dual function: it protects the capacitor edge from damage and simultaneously defines the recess position of the upper electrode. The spacer's outer surface acts as a self-aligning reference that guides the upper electrode formation process, eliminating the need for separate alignment procedures and reducing precision requirements.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The spacer creates a uniform recess depth across the entire upper electrode by providing a consistent reference surface. This equipotential approach ensures that all portions of the upper electrode are recessed by the same amount, preventing localized shorting issues and simplifying the manufacturing process.

Inventive Principle:
Principle #12Equipotentiality

Data Source

PatentUS11984353B2High capacitance MIM device with self aligned spacer
Publication Date: 2024.05.14 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11984353B2 patent drawing
  • US11984353B2 patent drawing
  • US11984353B2 patent drawing

AI summary

The present disclosure, in some embodiments, relates to a method of forming a capacitor structure. The method includes forming a capacitor dielectric layer over a lower electrode layer, and forming an upper electrode layer over the capacitor dielectric layer. The upper electrode layer is etched to define an upper electrode and to expose a part of the capacitor dielectric layer. A spacer structure is formed over horizontally extending surfaces of the upper electrode layer and the capacitor dielectric layer and also along sidewalls of the upper electrode. The spacer structure is etched to remove the spacer structure from over the horizontally extending surfaces of the upper electrode layer and the capacitor dielectric layer and to define a spacer. The capacitor dielectric layer and the lower electrode layer are etched according to the spacer to define a capacitor dielectric and a lower electrode.