Self-Aligned Source and Drain Contacts in Transistors
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Solution Overview
Problem
As integrated circuit technology nodes shrink, it becomes challenging to fabricate transistor devices with self-aligned source and drain contacts without forming shorts between the gate and source-drain regions, which requires increased spacing and surface area, especially in designs with unmerged source-drain structures.
Innovation Solution
A method involving the formation of intermediate transistor structures with vertical dielectric spacers, sacrificial layers, and specific masking techniques to create self-aligned source and drain contact structures, ensuring that the top surface of the gate is higher than the source and drain regions and using conductive material to fill openings defined by these spacers for contact formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If raised source-drain epitaxial regions are used to reduce contact resistance, then electrical contact performance is improved, but the risk of shorting between gate and source-drain regions increases
Solution Approach 1:
The patent transitions from planar contact formation to three-dimensional self-aligned contact formation by growing epitaxial source-drain regions that extend vertically above the substrate surface. This dimensional change allows contacts to be formed at elevated positions, reducing the risk of shorting while maintaining low contact resistance through direct electrical connection to the raised regions.
Solution Approach 2:
The patent performs preliminary formation of epitaxial source-drain regions before final contact patterning. By pre-growing the raised regions and forming protective spacer structures in advance, the process enables self-alignment of contacts to the gate, eliminating the need for additional alignment steps and reducing shorting risk.
2Reliability
If sufficient spacing is included between devices to prevent shorting, then reliability is improved, but surface area increases
Solution Approach 1:
By moving contact formation to a third dimension (vertical elevation through epitaxial growth), the patent reduces the horizontal spacing requirements between devices. Contacts are formed at elevated positions where interference between adjacent devices is minimized, allowing tighter device packing while maintaining reliability.
Solution Approach 2:
The self-aligned contact formation process uses the gate structure and epitaxial regions themselves to define contact positions, eliminating the need for external alignment margins. The process automatically ensures proper spacing and alignment, reducing surface area while maintaining shorting prevention.
3Area of stationary object
If self-aligned source and drain contacts are formed to reduce surface area, then manufacturing efficiency is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent implements self-aligned contact formation where the contact positions are automatically defined by the gate structure and epitaxial source-drain regions. The spacer structures grow conformally on existing features, using them as templates, which eliminates the need for separate alignment steps and reduces the burden on lithographic precision.
Solution Approach 2:
By pre-forming the gate structure and epitaxial regions with appropriate dimensions and positions, the patent creates built-in alignment references that guide subsequent contact formation. This preliminary structuring reduces the precision requirements for final contact patterning steps.
Data Source
AI summary
A transistor includes an active region supported by a substrate and having a source region, a channel region and a drain region. A gate stack extends over the channel region and a first sidewall surrounds the gate stack. A raised source region and a raised drain region are provided over the source and drain regions, respectively, of the active region adjacent the first sidewall. A second sidewall peripherally surrounds each of the raised source region and raised drain region. The second sidewall extends above a top surface of the raised source region and raised drain region to define regions laterally delimited by the first and second sidewalls. A conductive material fills the regions to form a source contact and a drain contact to the raised source region and raised drain region, respectively.