Self-Aligned Contacts for Vertical FETs
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Solution Overview
Problem
The formation of contacts in vertical field effect transistors (VFETs) is challenging due to overlay shift errors that can cause etches to penetrate through protective insulator layers, leading to short-circuits between conductive contacts and elements of the VFETs.
Innovation Solution
A method is developed to form self-aligned contacts by creating a self-assembled monolayer that selectively attaches to the bottom spacer, allowing an encapsulating material to be deposited without adhering to the gate stack, thereby preventing the encapsulating layer from extending beyond the defined area, and forming vias that do not penetrate the encapsulating layer to avoid short-circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a protective insulator layer is formed over the gate stack, then the gate conductor is protected from short-circuits, but overlay shift errors can cause etches to penetrate through the protective layer, leading to short-circuits between contacts and gate elements
Solution Approach 1:
A self-assembled monolayer is formed on the bottom spacer surface before depositing the encapsulating material. This preliminary action creates a selective adhesion barrier that prevents the encapsulating material from adhering to the bottom spacer, ensuring that the material stops exactly at the desired location without requiring high overlay precision during subsequent etching steps.
Solution Approach 2:
The self-assembled monolayer acts as an intermediary between the bottom spacer and the encapsulating material. This intermediary layer provides selective adhesion properties that control where the encapsulating material deposits, preventing it from extending beyond the gate stack area and eliminating the risk of short-circuits even with overlay shifts.
2Area of stationary object
If the encapsulating material is deposited over the entire structure, then complete coverage is achieved, but the material may extend beyond the defined area and cause short-circuits
Solution Approach 1:
The self-assembled monolayer is selectively formed only on the bottom spacer surface, creating local differences in adhesion properties. This allows the encapsulating material to deposit uniformly over the entire structure while adhering to the gate stack and sidewalls, but stopping at the bottom spacer boundary where the monolayer prevents further adhesion, thus achieving complete coverage without extension beyond the defined area.
3Ease of manufacture
If conventional deposition methods are used without selective adhesion control, then the process is simple, but the encapsulating layer cannot be precisely confined to the desired area
Solution Approach 1:
The self-assembled monolayer automatically forms on the bottom spacer surface through self-organization of molecules, creating the selective adhesion pattern without requiring complex external control mechanisms. This self-service approach maintains the simplicity of the deposition process while achieving precise boundary definition, as the monolayer inherently directs where the encapsulating material will and will not adhere.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures that conductive contacts can be formed without penetrating the protective layer, even in case of mispositioning, thereby preventing short-circuits between the conductive contacts and the gate conductor, enhancing the reliability of VFET fabrication.
Implementation Method 1
by forming a self-assembled monolayer that selectively attaches to the bottom spacer
Data Source
AI summary
Semiconductor devices and methods of forming the same include forming a gate stack in contact with sidewalls of a semiconductor fin and on a bottom spacer over a bottom source/drain region. An encapsulating material is selectively deposited over the gate stack, leaving the bottom spacer exposed. An inter-layer dielectric is formed over the encapsulating material. A via is formed in the inter-layer dielectric to contact the bottom source/drain layer.