Self-aligning Bottom Electrode for Phase Change Memory

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Solution Overview

Problem

Manufacturing phase change memory devices with small dimensions and low reset currents is challenging due to issues like shorts between top and bottom electrodes, and achieving tight process variation specifications for large-scale production is difficult.

Innovation Solution

A self-aligning method for the bottom electrode in phase change random access memory (PCRAM) devices is developed, where the top electrode serves as a mask for etching the bottom electrode, and chemical mechanical polishing is used to planarize both electrodes, ensuring electrical coupling through a phase change material in a pore between them.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If small pores are formed to reduce reset current, then reset current is reduced, but manufacturing precision becomes difficult to control

Engineering Contradiction:
Improvereset currentVSAvoidprocess variation specification
Core Design Contradiction:
Use of energy by moving objectVSManufacturing precision

Solution Approach 1:

The bottom electrode layer is planarized by chemical mechanical polishing before via formation, preparing a flat surface in advance that ensures precise via alignment and dimensions, thereby meeting tight process variation specifications while enabling small pore formation for reduced reset current

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The top electrode serves as a self-align mask for etching the bottom electrode, where the mask aligns automatically with the pore, eliminating the need for separate alignment steps and ensuring precise alignment while maintaining small dimensions for low reset current

Inventive Principle:
Principle #25Self-service

2Ease of manufacture

If TiN deposition on sidewalls is performed, then electrode formation is completed, but shorts between top and bottom electrodes occur

Engineering Contradiction:
Improveelectrode formationVSAvoidelectrode short
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The problematic TiN deposition on sidewalls is removed by selective etching, extracting only the harmful deposited material while preserving the functional electrodes, thereby preventing shorts while maintaining ease of manufacture

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

A dielectric layer is introduced as an intermediary between the top and bottom electrodes, preventing direct contact and potential shorts, while still allowing the electrodes to be formed through standard deposition processes

Inventive Principle:
Principle #24Intermediary (Mediator)

3Manufacturing precision

If self-align etching is used, then alignment precision is improved, but process complexity increases

Engineering Contradiction:
Improvealignment precisionVSAvoidetching process
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The top electrode structure serves as its own alignment mask, where the mask pattern is defined by the electrode geometry itself, enabling self-alignment during etching without requiring additional alignment steps or complex process control

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enables the creation of phase change memory devices with small dimensions and low reset currents, while being compatible with peripheral circuit manufacturing and avoiding electrode shorts, thus meeting the requirements for large-scale memory devices.

Implementation Method 1

a top electrode member serves as a mask for self-align etching of the bottom electrode member

Methodology Applied
Scientific EffectPhysical masking:

Implementation Method 2

The bottom electrode has a top surface that is planarized by chemical mechanical polishing. The top electrode also has a top surface that is planarized by chemical mechanical polishing.

Methodology Applied
Scientific EffectChemical mechanical polishing:

Implementation Method 3

A wet etching causes the length in a first segment in the second dielectric layer to be longer than the length in a first segment in the first dielectric layer

Methodology Applied
Scientific EffectWet etching:

Implementation Method 4

Phase change based memory materials have at least two solid phases, including for example a generally amorphous solid phase and a generally crystalline solid phase. Laser pulses are used in read-write optical disks to switch between phases and to read the optical properties of the material after the phase change.

Methodology Applied
Scientific EffectPhase change: Phase Change

Implementation Method 5

The change from the amorphous to the crystalline state is generally a lower current operation. The change from crystalline to amorphous, referred to as reset herein, is generally a higher current operation, which includes a short high current density pulse to melt or breakdown the crystalline structure

Methodology Applied
Scientific EffectJoule heating: Joule Heating

Data Source

PatentUS7825396B2Self-align planerized bottom electrode phase change memory and manufacturing method
Publication Date: 2010.11.02 MACRONIX INTERNATIONAL CO LTD
  • US7825396B2 patent drawing
  • US7825396B2 patent drawing
  • US7825396B2 patent drawing

AI summary

A method is described for self-aligning a bottom electrode in a phase change random access memory PCRAM device where a top electrode serves as a mask for self-aligning etching of the bottom electrode. The bottom electrode has a top surface that is planarized by chemical mechanical polishing. The top electrode also has a top surface that is planarized by chemical mechanical polishing. A bottom electrode layer like TiN is formed over a substrate and prior to the formation of a via during subsequent process steps. A first dielectric layer is formed over the bottom electrode layer, and a second dielectric layer is formed over the first dielectric layer. A via is formed at a selected section that extends through the first and second dielectric layers.