Self-Destruct SRAM Authentication Circuit Tampering

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Solution Overview

Problem

Existing power-on SRAM-based PUFs are not entirely satisfactory due to vulnerability to tampering techniques that can duplicate and compromise the reliability of the generated PUF signature.

Innovation Solution

An erasion circuit is coupled to the memory device to alter intrinsic characteristics, such as threshold voltage, of each bit, thereby altering the initial power-on states and generating a new PUF signature upon detection of tampering, preventing the signature from being compromised.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a PUF signature is generated based on initial power-on states of SRAM bits, then authentication capability is provided, but the signature becomes vulnerable to tampering techniques that can duplicate and compromise it

Engineering Contradiction:

ImprovePUF signature reliabilityVSAvoidtampering vulnerability

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary action by pre-charging the bit lines and word lines to specific voltage levels before the actual PUF signature generation. This preliminary voltage setup creates a controlled initial state that makes the PUF signature resistant to tampering, as the pre-charged lines ensure consistent and secure power-on states for the SRAM bits.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent changes the voltage parameters of the bit lines and word lines by applying specific pre-charge voltages (e.g., Vdd for bit lines, Vdd/2 for word lines). These parameter changes in voltage levels alter the initial power-on states of the SRAM bits in a controlled manner, enhancing the security and reliability of the generated PUF signature against tampering attacks.

Inventive Principle:

Principle #35Parameter changes

2Ease of manufacture

If conventional authentication methods are used with inscribed identities, then device identification is achieved, but the identity can be easily mimicked and reverse engineered

Engineering Contradiction:

Improveauthentication implementationVSAvoidauthentication security

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

The patent replaces the conventional mechanical/electrical inscription method (writing identity bits into SRAM) with a physics-based approach using PUF principles. Instead of storing a fixed inscribed identity, the system generates authentication signatures based on the inherent physical characteristics of the SRAM circuitry, making it impossible to mimic or reverse engineer while maintaining ease of manufacture.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS10438025B2Self-destruct SRAM-based authentication circuit

Publication Date: 2019.10.08 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A memory device is disclosed. The memory device includes a memory bit array comprising a plurality of memory bits, wherein each memory bit is configured to present an initial logic state when the memory device is powered on, and an erasion circuit, coupled to the memory bit array, and configured to alter an intrinsic characteristic of at least one of the memory bits so as to alter the initial logic state of the at least one memory bit.