Self-Timed Differential Amplifier for Memory Column Select Timing
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Solution Overview
Problem
Conventional memory circuits face inefficiencies and increased power consumption due to the need for precise control of the column select line's turn on/turn off timings.
Innovation Solution
A self-timed differential amplifier is introduced, featuring a pair of precharge transistors controlled by a control line and cross-coupled transistors controlled by a column select line, forming a complementary differential amplifier connected to read/write terminals, which eliminates the need for precise timing control and reduces power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the turn on/turn off timings of the column select line are accurately controlled in conventional memory circuits, then the data read/write operation can be performed correctly, but the power consumption increases and circuit efficiency decreases
Solution Approach 1:
The differential amplifier is designed to automatically generate timing control signals for the column select line through its own operation. The amplifier's internal nodes generate the necessary clock signals that control the turn on/turn off timings of the column select line, eliminating the need for external timing control circuits and reducing overall power consumption while maintaining reliable data read/write operations
2Reliability
If the turn on/turn off timings of the column select line are accurately controlled in conventional memory circuits, then the data read/write operation can be performed correctly, but the circuit efficiency decreases
Solution Approach 1:
The differential amplifier automatically generates the timing control signals for the column select line through its own operational phases. During the precharge phase, the amplifier nodes generate signals that automatically control the column select line timing, eliminating the need for external timing control logic and improving circuit efficiency while ensuring correct data read/write operations
Data Source
AI summary
The present invention provides a self-timed differential amplifier, including an amplifier unit, having a pair of read/write terminals, wherein data is read or written by a select line; a pair of precharge transistors, controlled by a control line; and a pair of cross-coupled transistors, controlled by a column select line. Moreover, a complementary differential amplifier is formed by the combination of the pair of precharge transistors and the pair of cross-coupled transistors. The pair of the precharge transistors and the pair of cross-coupled transistors are connected to the pair of read/write terminals of the amplifier unit.