Self-Timed Match Line Cascading in Partitioned CAM Arrays

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Solution Overview

Problem

Content addressable memory (CAM) devices face high power consumption due to the pre-charging and discharging of match lines during compare operations, which increases with the number of CAM cells in each row, leading to inefficient energy use.

Innovation Solution

The CAM array is partitioned into row segments, with selective enabling of subsequent segments based on match results from previous segments using self-timed control signals generated by a reference row, eliminating the need for complex match line control circuits and precise timing synchronization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If all row segments are pre-charged during compare operations, then search accuracy is maintained, but power consumption increases significantly

Engineering Contradiction:
Improvesearch accuracyVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The CAM array is divided into multiple row segments (first row segment, second row segment, etc.), each with its own match line segment. This segmentation allows independent control of pre-charging operations for each segment, enabling the system to pre-charge only the necessary segments based on match results from previous segments, thereby reducing overall power consumption while maintaining search accuracy.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The match line segment of the first row segment is pre-charged before the compare operation begins. Subsequent match line segments are conditionally pre-charged based on match results from previous segments. This preliminary action ensures that only segments that may contain matching entries are pre-charged, reducing unnecessary power consumption while maintaining search accuracy.

Inventive Principle:
Principle #10Preliminary action

2Use of energy by moving object

If complex match line control circuits are used to reduce power consumption, then energy efficiency improves, but device complexity increases

Engineering Contradiction:
Improveenergy efficiencyVSAvoidcircuit complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The system uses the match results from previous row segments to automatically control the pre-charging of subsequent match line segments. The match result signals directly enable or disable pre-charging of the next segment without requiring external control logic, making the system self-regulating and reducing the need for complex control circuits.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The match results from each row segment are fed back to control the pre-charging of the next segment. This feedback mechanism allows the system to dynamically adjust which segments are pre-charged based on actual match conditions, achieving power savings without complex external control logic.

Inventive Principle:
Principle #23Feedback

3Speed

If precise timing synchronization is implemented for match line control, then search speed is maintained, but device complexity increases

Engineering Contradiction:
Improvesearch speedVSAvoidtiming control complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The timing for pre-charging subsequent match line segments is automatically determined by the match results from previous segments. The system self-regulates the timing sequence without requiring external synchronization signals or complex timing control circuits, maintaining search speed while reducing complexity.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The match result detection function and the match line pre-charge control function are merged into a single integrated process. The same match result signals that indicate whether a segment contains a match are also used to control the pre-charging of the next segment, eliminating the need for separate timing synchronization circuits.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS8493763B1Self-timed match line cascading in a partitioned content addressable memory array
Publication Date: 2013.07.23 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US8493763B1 patent drawing
  • US8493763B1 patent drawing
  • US8493763B1 patent drawing

AI summary

A CAM array includes a plurality of regular rows and a reference row. Each regular row is partitioned into a plurality of row segments, with each row segment including a number of CAM cells coupled to a corresponding match line segment. The reference row generates self-timed control signals for corresponding segments of the regular rows. Control circuits selectively enable a respective row segment in response to a logical combination of match results in a previous row segment and an associated one of the self-timed control signals.