Fast Semantic Processor for Per-pin APG Memory Test
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Solution Overview
Problem
Conventional MTL compilers face scalability issues and high memory consumption when compiling complex test patterns for integrated circuits, especially for SoC chips with stateful logic, leading to prolonged compiling times and memory exhaustion.
Innovation Solution
A fast semantic processor is introduced to convert stateful patterns into stateless patterns by generating a closure from an abstract syntax tree, calculating interdependencies, and using a cache to handle recursive variables, thereby reducing memory consumption and compiling time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional MTL compiler is used to compile complex test patterns for SoC chips with stateful logic, then the compiler can handle stateful programming patterns, but the memory consumption increases sharply and compiling time is prolonged
Solution Approach 1:
The patent segments the compilation process by separating stateful and stateless pattern handling. The semantic processor identifies and extracts stateless sub-expressions from stateful programming patterns, compiling them separately using efficient stateless algorithms. This segmentation allows the system to handle complex stateful patterns while maintaining low memory consumption for the straightforward stateless portions.
Solution Approach 2:
The patent introduces an intermediary mechanism (the semantic processor with closure conversion) that translates stateful programming patterns into stateless representations. This intermediary layer converts recursive variable assignments into closure functions with explicit environments, enabling the use of efficient stateless compilation techniques while preserving the original stateful semantics through captured environments.
2Adaptability or versatility
If conventional MTL compiler is used to compile complex test patterns, then the compiler can process stateful logic, but the compiling time increases significantly
Solution Approach 1:
The compilation process is segmented into phases: semantic analysis to identify stateful expressions, closure conversion for recursive variables, and efficient code generation. By separating stateful and stateless pattern handling, the system compiles stateless portions rapidly while dedicating additional processing only to the necessary stateful conversions, significantly reducing overall compiling time.
Solution Approach 2:
The semantic processor performs preliminary analysis of programming patterns to identify stateful expressions and convert them to closures before the main compilation process. This preliminary conversion of recursive variables to closure form with captured environments prepares the code for efficient stateless compilation, avoiding time-consuming recursive evaluations during test execution.
3Productivity
If conventional MTL compiler is used for per-pin APG, then it can generate repeat trees for each pin, but scalability is limited when test patterns become more complex
Solution Approach 1:
The patent changes the fundamental parameter of pattern representation by converting stateful programming patterns into stateless closure-based representations. This parameter change enables the system to handle arbitrarily complex test patterns with multiple pins and recursive variables, as each pin's pattern is compiled independently using efficient stateless algorithms while preserving stateful semantics through closure environments.
Solution Approach 2:
The semantic processor provides a universal solution that handles both simple and complex test patterns uniformly. By converting all recursive variable assignments to closure form, the system creates a unified compilation approach that works for single-pin and multi-pin patterns, simple and complex logic, maintaining scalability across different pattern complexities.
Data Source
AI summary
System and method for implementing a memory test language compiler. The compiler includes a fast semantic processor for interpreting programming patterns in a test program, including converting stateful patterns into stateless patterns, and a device access timing generation module for generating an output based on the stateless patterns. The fast semantic processor can generate a closure for a device access line as the output. In the state of the closure, each device access line is in a closed state. A functor is formed from the interdependency of the variables and the loop dependency and a cache is used to handle recursive variables. The functor is propagated to device access lines as output, wherein the functor references the cache when needed.