Semi-insulating InP Buried Layer for Optical Feedback Suppression

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Solution Overview

Problem

Optical semiconductor devices face issues with reflection at exit end surfaces, leading to unstable operation and increased parasitic capacitance, which restricts high-speed operation and design flexibility, and the formation of eaves by buried layers can complicate production and optical beam injection.

Innovation Solution

A semi-insulating buried semiconductor layer is formed using an MOCVD process with organic chlorine-containing substances, creating a flat top surface and sloped regions to suppress eaves formation and allow for non-restricted mesa stripe direction, while maintaining a consistent layer thickness to reduce optical feedback and parasitic capacitance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If p/n carrier blocking layers are used to suppress reflection at the exit end surface, then reflection suppression is improved, but parasitic capacitance increases which degrades high-speed operation

Engineering Contradiction:
Improvereflection suppressionVSAvoidoperation speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The invention changes the material parameter from conventional p/n carrier blocking layers to semi-insulating InP buried layer, fundamentally altering the electrical properties to achieve low capacitance while maintaining reflection suppression functionality

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The semi-insulating InP buried layer is selectively positioned at the lateral sides of the mesa stripe, providing localized reflection suppression without the capacitive penalty of extended p/n blocking structures

Inventive Principle:
Principle #3Local quality

2Manufacturing precision

If mesa stripe extension direction is restricted to [011] directions to prevent eaves formation, then manufacturing precision is improved, but design flexibility and productivity are degraded

Engineering Contradiction:
Improveeaves formation controlVSAvoidproduction yield
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The invention changes the crystal orientation parameter by forming the semi-insulating InP buried layer on the (311)B surface, which fundamentally alters the growth characteristics to prevent eaves formation regardless of mesa stripe orientation

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The (311)B surface buried layer structure provides universal eaves prevention that works for any mesa stripe extension direction, making the process universally applicable and eliminating the need for precise directional control

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Area of stationary object

If buried layers grow to form eaves on the mesa stripe, then coverage is improved, but optical beam injection becomes difficult and production is complicated

Engineering Contradiction:
Improveburied layer coverageVSAvoidoptical beam injection
Core Design Contradiction:
Area of stationary objectVSEase of manufacture

Solution Approach 1:

The invention uses the curved (311)B surface geometry to control buried layer growth, creating a rounded profile that naturally prevents eave formation while maintaining adequate coverage, facilitating smooth optical beam injection

Inventive Principle:
Principle #14Spheroidality (Curvature)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively suppresses eaves formation, allows for flexible mesa stripe direction, reduces optical feedback, and enhances high-speed operation by minimizing parasitic capacitance, thereby stabilizing optical communication systems and improving production efficiency.

Implementation Method 1

a semi-insulating buried semiconductor layer formed on said semiconductor substrate so as to cover said first and second regions continuously... said step of depositing said semi-insulating buried semiconductor layer being conducted by adding an organic chlorine-containing substance

Methodology Applied
Scientific EffectChemical Vapour Deposition: Chemical Vapour Deposition

Implementation Method 2

said mesa stripe waveguide amplifying light guided therethrough by stimulated emission

Methodology Applied
Scientific EffectStimulated emission:

Implementation Method 3

there are formed flat regions in said first region along said mesa stripe waveguide respectively at said right and left regions of said mesa stripe waveguide with a flat surface at a level coincident to a top surface of said mesa stripe waveguide, and such that there are formed first and second sloped regions

Methodology Applied
Scientific EffectLateral growth:

Data Source

PatentEP1947747B1Optical semiconductor device and fabrication process thereof
Publication Date: 2011.09.21 FUJITSU LTD
  • EP1947747B1 patent drawingFigure 1
  • EP1947747B1 patent drawingFigure 2A~2C
  • EP1947747B1 patent drawingFigure 3A~3D

AI summary

An optical semiconductor, includes a semiconductor substrate (41) having a (100) principal surface, a waveguide mesa stripe (M1) formed on a first region (L1) of the semiconductor substrate, the waveguide mesa stripe guiding a light therethrough; a plurality of dummy mesa patterns (M2,M3) formed on the semiconductor substrate (41) in a second region (L2) at a forward side of the first region, and a semi-insulating buried semiconductor layer (50) formed on the semiconductor substrate (41) so as to cover the first and second regions (L1,L2) continuously, the semi-insulating buried semiconductor layer (50) filling a right side and a left side of the waveguide mesa stripe in the first region (L1) and a gap between the plurality of dummy mesa patterns (M4,M3) in the second region (L2). This structure decreases the sensitivity against optical feedback from externally reflected light in the case of the device being a laser diode.