Semiconductor Active Patterns with Different Pitches
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Solution Overview
Problem
As semiconductor devices become more highly integrated, there is a need for forming patterns with micro line widths beyond the resolution limit of photolithography devices and for creating active patterns with identical micro line widths and different pitches using a simplified process.
Innovation Solution
The method involves sequentially stacking hardmask layers and sacrificial layers on a substrate, forming mandrels and spacers with specific line widths and pitches, and using these as etching masks to create active patterns with varying pitches while maintaining identical line widths, employing techniques like quadruple and double patterning technologies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If photolithography process is used to form patterns, then manufacturing process is simple, but line width is limited by resolution limit value
Solution Approach 1:
The patent divides the pattern formation process into multiple stages using mandrels and spacers. First mandrels are formed, then spacers are deposited on mandrel side walls, followed by removal of mandrels and formation of second mandrels using the spacers as masks. This segmented approach enables sub-resolution patterning by breaking down a single complex lithography step into multiple simpler steps with different pitch requirements.
Solution Approach 2:
The patent transitions from two-dimensional planar patterning to three-dimensional structures by forming mandrels with height, depositing spacers on their side walls, and using these vertical structures as etching masks. This dimensional transition enables formation of patterns with line widths smaller than the photolithography resolution limit by utilizing the vertical dimension for pitch multiplication.
2Adaptability or versatility
If multiple photolithography processes are applied to form patterns with different pitches, then pitch variation is achieved, but process complexity increases
Solution Approach 1:
The spacer structure serves multiple functions: it acts as an etching mask for forming second mandrels, defines the pitch for subsequent active patterns, and enables pitch multiplication without requiring additional photolithography steps. This multi-functionality allows a single spacer formation process to achieve what would otherwise require multiple separate patterning processes.
Solution Approach 2:
The spacer acts as an intermediary element between the first mandrels and the final active patterns. By depositing spacers on mandrel side walls and using them as etching masks, the patent creates an intermediate structure that transfers the mandrel pattern to the final pattern with multiplied pitch, eliminating the need for direct photolithography patterning at the final pitch.
3Manufacturing precision
If micro line width patterns are formed, then integration density increases, but manufacturing difficulty increases
Solution Approach 1:
The spacer structure self-defines the pitch for active patterns through its width, which is determined by the mandrel dimensions and spacer deposition thickness. This self-aligned approach eliminates the need for separate alignment processes and reduces manufacturing difficulty by allowing the structure to automatically establish the required pitch without additional photolithography alignment steps.
Data Source
AI summary
Methods for fabricating semiconductor devices are provided including sequentially stacking hardmask layers, a first sacrificial layer, and a second sacrificial layer on a substrate, forming first mandrels on the first sacrificial layer by etching the second sacrificial layer, forming first spacers on side walls of the first mandrels, forming a photoresist pattern disposed outside a region from which the first mandrels have been removed, forming second and third mandrels by etching the first sacrificial layer using the first spacers and the photoresist pattern as respective etching masks, forming second and third spacers on side walls of the second and third mandrels, forming first and second active patterns respectively having first and second pitches by etching the hardmask layer and at least a portion of the substrate, and forming a device isolation layer so that upper portions of the first and second active patterns protrude therefrom.