Semiconductor Package Adhesion via Convex-Concave Pad Surface
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Solution Overview
Problem
The demand for smaller and more functional electronic devices has led to a need for semiconductor packages with vertically stacked semiconductor chips, but existing technologies face challenges in achieving strong and reliable adhesion between these chips, particularly due to the limitations in contact area and adhesion strength of conventional adhesive layers.
Innovation Solution
The semiconductor package design incorporates a first semiconductor chip with a semiconductor substrate and sequentially stacked protection layers, including a top layer with convex and concave portions that increase the contact area with an adhesive layer, enhancing the adhesion strength and reliability of chip stacking through thermal compression bonding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional adhesive layer is used between vertically stacked semiconductor chips, then the chip stacking can be achieved, but the adhesion strength and contact area are insufficient
Solution Approach 1:
The top surface of the upper pad is formed with a convex-concave pattern instead of a flat surface. This curvature variation increases the contact area with the adhesive layer, allowing for stronger adhesion between stacked semiconductor chips while maintaining the same pad footprint area.
Solution Approach 2:
The upper pad surface is designed with non-uniform local properties through the convex-concave pattern. Different regions of the pad surface have varying heights and contact characteristics, optimizing the local adhesion quality where the adhesive layer contacts the pad while maintaining electrical connectivity through the pad structure.
2Reliability
If the contact area between protection layers and adhesive layer is increased, then adhesion properties improve, but the fabrication process becomes more complex
Solution Approach 1:
The upper pad structure is segmented into multiple height levels creating convex and concave regions. This segmentation is achieved through selective etching or deposition processes that divide the pad surface into distinct zones, increasing adhesion contact area while using standard semiconductor fabrication techniques.
Solution Approach 2:
The convex-concave pattern is formed on the upper pad surface before the adhesive layer is applied. This preliminary structuring of the pad surface ensures that when the adhesive layer is deposited, it naturally conforms to the pattern and maximizes contact area, eliminating the need for additional post-adhesion processing steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design increases the contact area between the protection layers and the adhesive layer, improving the adhesion properties and reducing the process time for chip stacking, thereby enhancing the reliability and production efficiency of semiconductor packages.
Implementation Method 1
enhancing the adhesion strength and reliability of chip stacking through thermal compression bonding
Data Source
AI summary
A semiconductor package may include a first semiconductor chip, a second semiconductor chip on the first semiconductor chip, and an adhesive layer between the first semiconductor chip and the second semiconductor chip. The first semiconductor chip may include a semiconductor substrate and a plurality of protection layers on the semiconductor substrate. The topmost layer of the protection layers may have a top surface with convex portions and concave portions, and the convex portions and the concave portions may be in contact with the adhesive layer.