Semiconductor Interconnection with Air Gap and Barrier Penetration
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Solution Overview
Problem
Semiconductor devices face challenges with signal transfer speed due to high electrical resistance in aluminum interconnections and interference issues between closely spaced copper interconnections, which affect operating speed and reliability.
Innovation Solution
A semiconductor device design featuring a first conductive pattern with an insulating diffusion barrier layer and an air gap region, where a second conductive pattern penetrates the barrier layer, and an upper interlayer insulating layer with a porous silicon oxy hydrocarbon layer to reduce interference and enhance mechanical strength, along with a sacrificial hydrocarbon layer for forming air gaps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If aluminum interconnections are used, then manufacturing cost is reduced, but electrical resistance increases and signal transfer speed decreases
Solution Approach 1:
The patent uses aluminum for lower interconnection layers where cost is critical and electrical resistance is less problematic, accepting the trade-off of higher resistance in exchange for manufacturing cost reduction. This selective material assignment optimizes overall device performance while controlling costs.
2Reliability
If copper interconnections are used, then electrical resistance is reduced and signal transfer speed is improved, but manufacturing complexity increases due to etching difficulties
Solution Approach 1:
The patent divides the interconnection structure into multiple layers with different materials - copper for upper layers requiring high signal transfer speed, and aluminum or other materials for lower layers. This segmentation allows each layer to be optimized for its specific function while simplifying the overall manufacturing process.
Solution Approach 2:
The patent employs composite interconnection structures where different materials (copper, aluminum, tungsten, cobalt, platinum) are used in different layers or regions. This composite approach combines the advantages of each material - copper's low resistance for speed-critical paths, aluminum's ease of manufacture for other connections, and tungsten's high melting point for specific applications.
3Productivity
If interconnection spacing is reduced for high integration, then device density increases, but interference between interconnections increases and signal transfer speed decreases
Solution Approach 1:
The patent applies different dielectric materials with different properties to different regions between interconnections. Low-k dielectric materials are used in regions where interference is most problematic to reduce capacitive coupling, while other dielectric materials are used in regions where mechanical strength or other properties are prioritized. This local optimization reduces interference while maintaining high integration density.
4Reliability
If dielectric constant of insulating layer is reduced to reduce interference, then signal transfer speed is improved, but mechanical strength of the structure decreases
Solution Approach 1:
The patent uses composite dielectric structures combining low-k dielectric materials (for reduced interference and improved signal transfer) with porous fill materials or other structural components (for mechanical strength). This composite approach allows the low-k material to reduce capacitive coupling and improve electrical performance while the porous fill or structural layers maintain the mechanical integrity of the interconnection structure.
Data Source
AI summary
A semiconductor device includes a first conductive pattern on a substrate, an insulating diffusion barrier layer conformally covering a surface of the first conductive pattern, the insulation diffusion barrier layer exposed by an air gap region adjacent to a sidewall of the first conductive pattern, and a second conductive pattern on the first conductive pattern, the second conductive pattern penetrating the insulating diffusion barrier layer so as to be in contact with the first conductive pattern.