Semiconductor Air-Gap Spacers for Gate Contact Capacitance
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Solution Overview
Problem
As semiconductor technology advances to smaller geometries, stray capacitance between the gate structure and source/drain contacts in field effect transistors increases, hindering device switching speed, power consumption, and coupling noise performance, despite the use of low-k materials.
Innovation Solution
The introduction of air-gap spacers interposed between the gate structure and source/drain contacts, replacing conventional solid dielectric spacers, to reduce relative permittivity and stray capacitance, achieved through a method involving sacrificial spacer layers, etching processes, and sealing air gaps with dielectric layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If conventional solid dielectric spacers are used between gate structure and source/drain contacts, then structural integrity and manufacturing simplicity are maintained, but stray capacitance remains large due to higher relative permittivity
Solution Approach 1:
The patent introduces air-gap spacers containing voids or porous regions between the gate structure and source/drain contacts. These porous structures have significantly lower effective permittivity compared to solid dielectric materials, thereby reducing stray capacitance. The air gaps are formed by removing sacrificial materials or by direct deposition of porous dielectric layers, creating a structure that maintains mechanical integrity while minimizing capacitive coupling.
Solution Approach 2:
The air-gap spacer structure combines multiple materials including porous dielectric materials, air voids, and potentially low-k materials to create a composite spacer system. This composite approach allows optimization of both electrical properties (low permittivity) and mechanical properties (structural support), resolving the contradiction between reducing stray capacitance and maintaining device integrity.
2Productivity
If geometry size is reduced to increase functional density, then production efficiency and cost are improved, but stray capacitance between gate and source/drain contacts increases due to smaller distances
Solution Approach 1:
The patent changes the dielectric parameter (permittivity) of the spacer material from conventional solid dielectric values to much lower values by introducing air gaps. This parameter change in the spacer's effective permittivity compensates for the reduced physical distance between gate and source/drain contacts, allowing continued scaling while controlling stray capacitance.
Solution Approach 2:
By implementing porous air-gap spacers, the patent enables further miniaturization of device geometries without proportionally increasing stray capacitance. The porous structure provides electrical isolation with lower capacitive coupling, allowing higher functional density to be achieved while maintaining acceptable stray capacitance levels.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces stray capacitance, improving device switching speed and power efficiency by creating air gaps that lower the relative permittivity between the gate and source/drain contacts, enhancing overall performance.
Implementation Method 1
reducing relative permittivity to reduce stray capacitance
Data Source
AI summary
A method includes forming a gate structure on a substrate, forming a seal spacer covering a sidewall of the gate structure, forming a sacrificial spacer covering a sidewall of the seal spacer, forming source/drain regions sandwiching a channel region that is under the gate structure, and depositing a contact etch stop layer covering a sidewall of the sacrificial spacer. The method further includes removing the sacrificial spacer to form a trench, wherein the trench exposes a sidewall of the contact etch stop layer and the sidewall of the seal spacer, and depositing an inter-layer dielectric layer, wherein the inter-layer dielectric layer caps the trench, thereby defining an air gap inside the trench.


