Semiconductor Conductive Patterns with Air-Gap Supporting Structures

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Solution Overview

Problem

Semiconductor devices face challenges in achieving higher integration, lower power consumption, and faster operating speeds due to the high electrical resistivity of aluminum interconnection lines and difficulties in patterning copper lines, leading to electrical interference and signal delay issues.

Innovation Solution

The semiconductor device incorporates a substrate with conductive patterns, a capping layer defining an air-gap region, and a supporting pattern with a slanted side surface, along with protection layers, to minimize electrical interference and enhance signal transfer speed, while using a method involving plasma treatment and sacrificial layers to form the air-gap region.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If aluminum interconnection lines are used, then cost is reduced, but electrical resistivity increases leading to slower operating speeds

Engineering Contradiction:
Improveoperating speedVSAvoidelectrical resistivity
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent changes the material parameter from aluminum to copper to reduce electrical resistivity and improve operating speed. This material substitution directly addresses the contradiction by selecting a material with superior electrical conductivity properties.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs a composite structure combining copper interconnection lines with a low-dielectric-constant material layer. This composite approach leverages copper's excellent electrical conductivity while using the low-k material to reduce capacitive coupling and signal interference, thereby improving overall signal transmission performance.

Inventive Principle:
Principle #40Composite materials

2Loss of energy

If copper interconnection lines are used, then electrical conductivity improves, but patterning difficulty increases

Engineering Contradiction:
Improveelectrical conductivityVSAvoidpatterning difficulty
Core Design Contradiction:
Loss of energyVSEase of manufacture

Solution Approach 1:

The patent introduces a mandrel structure as an intermediary element to facilitate copper patterning. The mandrel serves as a temporary support that enables precise copper deposition and pattern formation, after which the mandrel is removed. This intermediary approach solves the patterning difficulty while maintaining copper's superior electrical conductivity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent performs preliminary actions by forming the mandrel structure and applying low-k material before copper deposition. These preparatory steps create a controlled environment that enables accurate copper patterning, addressing the manufacturing difficulty while preserving electrical conductivity benefits.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If spacing between interconnection lines is reduced, then integration density increases, but electrical interference increases

Engineering Contradiction:
Improveintegration densityVSAvoidelectrical interference
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent uses a composite structure with copper interconnection lines and low-dielectric-constant material. The low-k material has a dielectric constant less than 3.0, which significantly reduces capacitive coupling between closely spaced conductors, thereby minimizing electrical interference while enabling higher integration density.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The patent changes the dielectric constant parameter of the material between interconnection lines from conventional values to less than 3.0. This parameter change reduces the electrical field coupling between adjacent lines, allowing closer spacing without increasing electrical interference, thus improving integration density.

Inventive Principle:
Principle #35Parameter changes

4Device complexity

If capping layer is placed directly on conductive patterns, then manufacturing is simplified, but capping layer collapse occurs

Engineering Contradiction:
Improvemanufacturing complexityVSAvoidcapping layer stability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent introduces a mandrel structure as an intermediary support between the capping layer and the conductive patterns. The mandrel provides mechanical support to the capping layer during manufacturing processes, preventing collapse. After the capping layer is properly formed and stabilized, the mandrel is removed, leaving a reliable structure without excessive complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS9741608B2Methods of fabricating semiconductor devices including supporting patterns in gap regions between conductive patterns
Publication Date: 2017.08.22 SAMSUNG ELECTRONICS CO LTD
  • US9741608B2 patent drawing
  • US9741608B2 patent drawing
  • US9741608B2 patent drawing

AI summary

An integrated circuit device includes spaced apart conductive patterns on a substrate surface, and a supporting pattern on the substrate surface between adjacent ones of the conductive patterns and separated therefrom by respective gap regions. The adjacent ones of the conductive patterns extend away from the substrate surface beyond a surface of the supporting pattern therebetween. A capping layer is provided on respective surfaces of the conductive patterns and the surface of the supporting pattern. Related fabrication methods are also discussed.