Semiconductor Device with Air Gaps and Supporting Pillars
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Solution Overview
Problem
The scaling down of semiconductor devices poses challenges in achieving improved quality, yield, and reliability due to issues such as resistive-capacitive delay induced by parasitic capacitance from adjacent conductive elements.
Innovation Solution
A semiconductor device design featuring a semiconductor substrate with conductive elements, insulating blocks, supporting pillars, and spaces between them, along with a sealing layer, which alleviates parasitic capacitance and enhances mechanical strength by incorporating undoped oxide materials and air gaps with specific dimensions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If conductive elements are scaled down to improve computing ability, then device dimensions are reduced, but parasitic capacitance from adjacent conductive elements increases causing resistive-capacitive delay
Solution Approach 1:
The patent extracts the problematic parasitic capacitance effect by introducing spaces (air gaps) between adjacent conductive elements. These spaces remove the dielectric material that would otherwise contribute to parasitic capacitance, directly addressing the resistive-capacitive delay issue while maintaining scaled-down dimensions
Solution Approach 2:
The patent introduces insulating blocks as intermediary structures positioned between adjacent conductive elements. These insulating blocks act as mediators that electrically isolate the conductive elements from each other, reducing parasitic capacitance coupling while maintaining the compact device structure
2Reliability
If spaces are introduced between conductive elements to reduce parasitic capacitance, then resistive-capacitive delay is reduced, but mechanical strength may be compromised
Solution Approach 1:
The patent employs composite material structures combining conductive elements, insulating blocks, and supporting pillars. The supporting pillars made of mechanical strength materials compensate for the structural voids created by spaces, maintaining overall mechanical strength while preserving the electrical isolation benefits
Solution Approach 2:
The patent applies different material properties to different regions: spaces are strategically positioned where mechanical strength is less critical, while supporting pillars are placed in load-bearing regions. This local differentiation allows mechanical strength to be maintained in critical areas while preserving parasitic capacitance reduction in other areas
3Reliability
If insulating blocks and supporting pillars are added to reduce parasitic capacitance, then electrical performance is improved, but device complexity increases
Solution Approach 1:
The patent designs insulating blocks that serve multiple functions: they provide electrical isolation between conductive elements, act as structural support, and define the geometry of spaces. This multi-functionality reduces the need for separate dedicated structures, thereby limiting the increase in device complexity
Data Source
AI summary
The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a semiconductor substrate, a plurality of first set conductive elements separately positioned above the semiconductor substrate, a plurality of insulating blocks respectively correspondingly positioned between adjacent pairs of the plurality of first set conductive elements, a plurality of first set supporting pillars respectively correspondingly positioned between adjacent pairs of the plurality of first set conductive elements and respectively correspondingly positioned over the plurality of insulating blocks, and a plurality of spaces respectively correspondingly positioned adjacent to the plurality of first set supporting pillars and respectively correspondingly positioned over the plurality of insulating blocks.