Semiconductor Packaging Using Embedded Alignment Marks
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Solution Overview
Problem
Conventional embedded package structures for electronic components are not cost-effective due to the need for a metallic frame and the use of conductive or non-conductive paste for attachment, which increases fabrication costs and may result in deformation and misalignment.
Innovation Solution
A packaging method involving a first insulation layer with stacked prepreg layers, a metallic protective layer, and alignment marks for precise placement of electronic components within an accommodation cavity, eliminating the need for a metallic frame and paste attachment, and utilizing a thermal release tape for temporary fixation and subsequent lamination of insulation layers for secure fixation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a metallic frame is formed on the substrate to control the opening shape, then the embedding precision of electronic components is improved, but the fabrication cost increases
Solution Approach 1:
The patent removes the metallic frame from the package structure entirely. Instead of forming a metallic frame on the substrate to control opening shape, the invention uses a substrate with a predefined opening formed directly in the substrate material, eliminating the need for additional metallic frame formation processes and reducing fabrication costs while maintaining embedding precision through the substrate's inherent structural control
Solution Approach 2:
The substrate serves multiple functions: it provides the opening for component embedding, acts as the structural base, and eliminates the need for separate metallic frame and attachment paste. The substrate integrates the functions previously requiring multiple additional components and processes, thereby reducing fabrication cost while maintaining manufacturing precision
2Ease of manufacture
If conductive or non-conductive paste is used to attach electronic components to the substrate, then the component attachment is achieved, but the fabrication cost increases and deformation may occur
Solution Approach 1:
The patent eliminates the use of conductive or non-conductive paste for component attachment. Instead of applying paste to attach components to the substrate, the invention directly embeds components into openings formed in the substrate, removing the paste application step and associated costs while avoiding paste-related deformation issues
Solution Approach 2:
The substrate's opening structure itself provides the attachment mechanism. The component is inserted into and retained by the opening's geometry and the substrate's structural properties, eliminating the need for external paste materials to provide attachment functionality
3Area of stationary object
If an embedded package structure is adopted, then the footprint and profile are reduced, but the fabrication process becomes more complex
Solution Approach 1:
The patent removes complex fabrication steps from the embedded package process. By eliminating metallic frame formation and paste application steps, the fabrication process becomes simpler while maintaining the compact embedded structure's footprint advantages
Solution Approach 2:
The opening is formed in the substrate before component placement, and the component is directly embedded in a single integrated process. This preliminary formation of the opening structure simplifies the overall fabrication process compared to methods requiring sequential frame formation, paste application, and component attachment steps
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method reduces fabrication costs by eliminating the need for a metallic frame and paste, ensures precise alignment and secure fixation of electronic components, and enhances the performance of the package structure by preventing deformation during lamination.
Implementation Method 1
a carrier plate is attached on the first surface of the first insulation layer through a thermal release tape layer
Implementation Method 2
a semi-cured second insulation layer is placed over the second surface of the first insulation layer, and the second insulation layer is laminated and cured
Data Source
AI summary
A first insulation layer comprising stacked prepreg layers is provided, and a metallic protective layer is formed on the first insulation layer. A first alignment mark is formed on the first insulation layer, and an accommodation cavity is formed in the first insulation layer according to the first alignment mark. A second alignment mark is formed on the first insulation layer according to the first alignment mark. A carrier plate is attached on the first insulation layer through a thermal release tape layer, and the semiconductor device is temporarily fixed on the thermal release tape layer within the accommodation cavity according to the second alignment mark. A semi-cured second insulation layer is placed over the first insulation layer, and the second insulation layer is laminated and cured. A re-distribution layer is formed on the second insulation layer, and the re-distribution layer is electrically connected with the semiconductor device.