Semiconductor Device Asymmetric Double-Gate Structure

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Solution Overview

Problem

Semiconductor devices with a double-gate structure face challenges in securing resistance against destruction by bidirectional voltage between main electrodes, requiring higher maximum application voltages and complicating design due to the need for enhanced withstand voltage and gate voltage generation circuits, while also experiencing increased switching loss and reduced design freedom.

Innovation Solution

The semiconductor device incorporates specific layer configurations and gate structures, including first and second semiconductor layers of different conductivity types, main and control electrodes, and gate channel regions, with isolated gate insulating films, to control voltage application and channel formation, allowing for secure operation across a range of voltages without expanding the voltage range applied to control electrodes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If a bidirectional pn junction is formed by providing gates on both sides of main surfaces in a double-gate structure, then switching loss is reduced and tradeoff between on voltage and switching loss is improved, but withstand voltage under opposite polarity voltage cannot be secured and element destruction risk increases

Engineering Contradiction:
Improveswitching lossVSAvoidwithstand voltage under opposite polarity
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The patent applies asymmetry by configuring the first and second gates differently - the first gate has a gate insulating film and controls channel formation, while the second gate is positioned to block opposite polarity voltage without requiring a bidirectional pn junction. This asymmetric configuration allows the device to achieve low switching loss through double-gate control while maintaining high withstand voltage capability under opposite polarity conditions, resolving the technical contradiction between switching performance and reliability.

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

The patent implements local quality by providing specific structural features at different locations: the first gate channel region is selectively formed with a gate insulating film for controlled channel formation, while the second gate is positioned to provide localized voltage blocking. This localized functional differentiation enables the device to optimize switching loss reduction at the first gate while ensuring opposite polarity protection at the second gate, thereby resolving the contradiction between switching efficiency and withstand voltage capability.

Inventive Principle:
Principle #3Local quality

2Adaptability or versatility

If gates are provided on both sides to form channels, then a wider range of voltages must be applied to control electrodes, but maximum application voltage increases and special measures for withstand voltage design are required

Engineering Contradiction:
Improvevoltage control rangeVSAvoidmaximum application voltage and gate voltage generation circuit
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent extracts the voltage blocking function from the gate structure by positioning the second gate to inherently block opposite polarity voltage through its physical configuration and connection to the second main surface. This extraction eliminates the need for complex bidirectional pn junctions and high-voltage rated gate insulating films, allowing the device to maintain a wider voltage control range while avoiding the complexity of high maximum application voltages and specialized gate voltage generation circuits.

Inventive Principle:
Principle #2Taking out (Extraction)

3Loss of energy

If a double-gate structure is used to improve tradeoff between on voltage and switching loss, then switching performance is enhanced, but design freedom is reduced due to requirements for enhanced withstand voltage and gate voltage generation circuits

Engineering Contradiction:
Improveswitching lossVSAvoiddesign freedom
Core Design Contradiction:
Loss of energyVSAdaptability or versatility

Solution Approach 1:

The patent inverts the conventional approach by not requiring both gates to have identical bidirectional voltage blocking capabilities. Instead, the first gate is optimized for channel control with a gate insulating film, while the second gate is configured to provide voltage blocking through its positioning and connection to the second main surface. This inverted design strategy maintains the switching loss benefits of double-gate structures while restoring design freedom by eliminating the need for complex high-voltage rated components and specialized gate voltage generation circuits.

Inventive Principle:
Principle #13The other way round (Inversion)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances resistance against bidirectional voltage, reduces switching loss, and maintains design flexibility by ensuring the semiconductor device can operate safely within voltage limits comparable to single-gate structures, thereby improving reliability and efficiency.

Implementation Method 1

The first control electrode is isolated from the first gate channel region by a first gate insulating film

Methodology Applied
Scientific EffectElectrical insulation: Dielectric

Implementation Method 2

first, third, and fifth semiconductor layers of a first conductivity type, second and fourth semiconductor layers of a second conductivity type

Methodology Applied
Scientific Effectpn junction: Diode

Data Source

PatentUS11031491B2Semiconductor device
Publication Date: 2021.06.08 MITSUBISHI ELECTRIC CORP
  • US11031491B2 patent drawing
  • US11031491B2 patent drawing
  • US11031491B2 patent drawing

AI summary

A normally-off first gate channel region is provided on a first main surface side, in a region in a p base between an n base and an n emitter connected to an emitter electrode. On and off of the first gate channel region is controlled by a voltage of a first gate electrode. A normally-on second gate channel region is provided on a second main surface side, by an n-type region between an n collector electrically connected to a collector electrode and the n base. On and off of the second gate channel region is controlled by a voltage of a second gate electrode.