Semiconductor Auto-Pre-Charge Circuit for Burst Length Adaptation
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Solution Overview
Problem
Semiconductor devices face challenges in efficiently managing auto-pre-charge operations, particularly when performing write or read operations with varying burst lengths, leading to inefficiencies in column operations and bubble periods across different bank modes.
Innovation Solution
The semiconductor device incorporates an I/O control signal generation circuit, a pipe circuit, and an auto-pre-charge signal generation circuit to synchronize and latch command/address signals based on bank modes and burst lengths, generating auto-pre-charge signals to optimize operations during bubble periods.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the semiconductor device performs auto-pre-charge operations with varying burst lengths, then the adaptability to different operation modes is improved, but the efficiency of column operations and bubble period management deteriorates
Solution Approach 1:
The patent implements dynamic adjustment of the pipe circuit stage count based on the detected bank mode. When operating in 8-bank mode, the system configures the pipe circuit to operate with a first stage count, and when in 16-bank mode, it switches to a second stage count. This dynamic reconfiguration allows the system to adapt to different burst lengths and bank modes while maintaining optimal column operation efficiency, resolving the contradiction between adaptability and productivity.
2Device complexity
If the semiconductor device uses a fixed pipe circuit configuration, then the device complexity is reduced, but the ability to handle different bank modes and burst lengths deteriorates
Solution Approach 1:
The patent designs the pipe circuit with multi-functionality, enabling it to operate in different configurations depending on the bank mode. The same physical pipe circuit infrastructure can be configured to handle both 8-bank mode and 16-bank mode operations by adjusting the stage count. This universal design approach allows the device to handle multiple bank modes and burst lengths without requiring separate dedicated circuits for each mode, thus maintaining relatively simple device complexity while achieving high adaptability.
Data Source
AI summary
A semiconductor device includes an input/output (I/O) control signal generation circuit, a pipe circuit and an auto-pre-charge signal generation circuit. The I/O control signal generation circuit generates an input control signal, an output control signal and an internal output control signal. The pipe circuit latches an internal command/address signal based on the input control signal and outputs the latched internal command/address signal as a latch signal. The auto-pre-charge signal generation circuit generates an auto-pre-charge signal from the latch signal and the internal latch signal.