Semiconductor Device Back Surface Bonding for Resistance Change Memory
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Solution Overview
Problem
Existing semiconductor devices with resistance change devices on the back surface of a substrate face challenges in achieving improved characteristics due to level differences and low smoothness, leading to increased wiring resistance and parasitic capacitance.
Innovation Solution
A semiconductor device configuration where a selection transistor is on the front surface of a first substrate, and a resistance change device and connection layer are in a second member, bonded to the back surface of the first member, allowing the resistance change device to be formed on a smooth surface without level differences, enhancing its characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the resistance change device is formed on the back surface of the substrate, then the device integration is improved, but the surface smoothness deteriorates due to level differences from lower layer structures
Solution Approach 1:
The patent divides the substrate into a front surface and a back surface, forming different device components on each surface. The selection transistor is formed on the front surface while the resistance change device is formed on the back surface, allowing each surface to be optimized independently for its specific function without interference from level differences.
Solution Approach 2:
The patent utilizes the third dimension (depth/thickness of the substrate) to resolve the contradiction by moving the resistance change device to the back surface of the substrate. This dimensional transition allows the resistance change device to be formed on a smooth back surface that is free from level differences caused by lower layer structures on the front surface.
2Device complexity
If the resistance change device is formed on the back surface of the substrate, then the device integration is improved, but the wiring resistance increases due to poor surface smoothness
Solution Approach 1:
The patent transitions the resistance change device formation to another dimension (the back surface of the substrate), which provides a smooth surface free from level differences. This enables the formation of continuous, low-resistance wiring layers without the interference of underlying structure variations.
Solution Approach 2:
The patent extracts the resistance change device formation process from the front surface structure, removing it from the region with level differences and lower layer structures. This separation allows the wiring layers to be formed on a smooth back surface, eliminating the source of increased wiring resistance.
3Device complexity
If the resistance change device is formed on the back surface of the substrate, then the device integration is improved, but the parasitic capacitance increases due to surface irregularities
Solution Approach 1:
The patent moves the resistance change device to the back surface of the substrate, utilizing the third dimension to access a smooth surface free from level differences. This dimensional transition reduces surface irregularities that would otherwise increase parasitic capacitance between adjacent wiring layers.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves the characteristics of the resistance change device by reducing wiring resistance and parasitic capacitance, enabling high-speed operation and facilitating the formation of a memory with increased capacity.
Implementation Method 1
a connection layer that comes in contact with the resistance change device, the connection layer being bonded to a back surface of the first member
Data Source
AI summary
A semiconductor device including: a first member including a selection transistor on a front surface side of a first substrate; and a second member including a resistance change device and a connection layer that comes in contact with the resistance change device, the connection layer being bonded to a back surface of the first member.