Semiconductor Barrier Height Adjustment for Schottky Stability
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Solution Overview
Problem
Existing semiconductor devices with Schottky barrier electrodes face challenges in achieving low turn-on voltage, enhanced thermal stability, and improved withstand voltage due to issues with adhesion at interfaces and temperature-dependent barrier height variations.
Innovation Solution
A semiconductor device is designed with two or more adjustment regions of varying barrier height between the semiconductor region and the barrier electrode, where the barrier height at the interface between the adjustment regions and the barrier electrode is higher than at the interface between the semiconductor region and the barrier electrode, enhancing Schottky characteristics and thermal stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If a Schottky barrier electrode is used to increase reverse direction withstand voltage, then the withstand voltage is improved, but the forward direction turn-on voltage increases
Solution Approach 1:
The patent applies local quality by creating adjustment regions with different barrier heights at different locations. Specifically, the interface between the adjustment region and the barrier electrode has a higher barrier height than the interface between the semiconductor region and the barrier electrode. This spatial variation in barrier height allows the device to achieve high reverse withstand voltage while maintaining low forward turn-on voltage, resolving the contradiction between these two parameters.
2Reliability
If electrode materials are limited to improve adhesion at Schottky and Ohmic junction interfaces, then adhesion is improved, but the selection of electrode materials is restricted
Solution Approach 1:
The adjustment region acts as an intermediary layer between the semiconductor region and the barrier electrode. By introducing this intermediate structure with controlled barrier height, the patent improves adhesion at the Schottky and Ohmic junction interfaces without requiring strict limitations on electrode material selection. The adjustment region mediates the interface properties, allowing for better adhesion while maintaining material flexibility.
3Reliability
If barrier height is increased to improve thermal breakdown resistance, then thermal stability is improved, but the turn-on voltage increases
Solution Approach 1:
The patent resolves this contradiction by applying local quality through spatially differentiated barrier heights. The adjustment regions have higher barrier height at the interface with the barrier electrode, which improves thermal breakdown resistance. Meanwhile, the overall device structure maintains lower effective barrier height for forward conduction, ensuring low turn-on voltage. This localized variation in barrier height allows simultaneous optimization of both thermal stability and turn-on characteristics.
4Strength
If guard rings are arranged to alleviate electric field concentration, then withstand voltage is improved, but the withstand voltage deteriorates when guard rings are shorted to the main junction
Solution Approach 1:
The patent extracts the problematic shorted guard ring structure and replaces it with adjustment regions that have controlled barrier heights. By removing the shorted guard ring configuration and instead using adjustment regions with higher barrier height at their interface with the barrier electrode, the patent eliminates the contradiction where guard rings both improve and deteriorate withstand voltage. The adjustment regions provide electric field management without the harmful shorting effect.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The semiconductor device achieves reduced turn-on voltage, enhanced thermal stability, and improved withstand voltage by optimizing the barrier height configuration, leading to excellent Schottky characteristics and semiconductor performance.
Implementation Method 1
a barrier electrode arranged on the semiconductor region; and two or more adjustment regions of barrier height that are on a surface of the semiconductor region and arranged between the semiconductor region and the barrier electrode, the adjustment regions are configured such that barrier height at an interface between the adjustment regions and the barrier electrode is higher than barrier height at an interface between the semiconductor region and the barrier electrode
Data Source
AI summary
A semiconductor device with an enhanced semiconductor characteristics that is useful for power devices. A semiconductor device including: a semiconductor region; a barrier electrode arranged on the semiconductor region; and two or more adjustment regions of barrier height that are on a surface of the semiconductor region and arranged between the semiconductor region and the barrier electrode, the adjustment regions are configured such that barrier height at an interface between the adjustment regions and the barrier electrode is higher than barrier height at an interface between the semiconductor region and the barrier electrode.