Semiconductor Barrier Layer Layout to Prevent Peripheral Dielectric Fracture

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Solution Overview

Problem

During semiconductor structure manufacturing, fractures often occur between the dielectric layer in the peripheral region and the first barrier layer in the core region, leading to substrate exposure and potential device damage, resulting in low yield.

Innovation Solution

A method involving the formation of a first barrier layer that covers both the core and peripheral regions, with a dielectric and conductive layer laminated on it, and selectively removing parts of these layers to reserve them closer to the peripheral region, ensuring the substrate is partially covered and reducing exposure risks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the dielectric layer and first conductive layer are completely removed from the core region, then the manufacturing process can proceed as planned, but fractures occur between the dielectric layer in the peripheral region and the first barrier layer in the core region, causing substrate exposure and device damage

Engineering Contradiction:
Improvemanufacturing efficiencyVSAvoidstructural integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary action by forming a second barrier layer on the first barrier layer before removing the dielectric layer and first conductive layer. This second barrier layer is strategically positioned to provide continuous protection during the removal process, preventing substrate exposure and fractures. The second barrier layer acts as a preventive measure that is prepared in advance to counteract the potential harm of substrate exposure during manufacturing.

Inventive Principle:
Principle #10Preliminary action

2Ease of manufacture

If the first barrier layer is completely removed from the peripheral region, then the desired device structure is achieved, but the substrate becomes exposed and vulnerable to damage during subsequent processing steps

Engineering Contradiction:
Improvedevice structure formationVSAvoidsubstrate exposure risk
Core Design Contradiction:
Ease of manufactureVSObject-affected harmful factors

Solution Approach 1:

The patent segments the barrier layer protection function by creating two distinct barrier layers with different roles. The first barrier layer is selectively removed from the peripheral region to form the desired device structure, while the second barrier layer is formed to provide continuous protection where needed. This segmentation allows the system to simultaneously achieve both device structure formation and substrate protection.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The second barrier layer acts as an intermediary protective element between the substrate and the processing environment. It is formed on the first barrier layer and provides a protective interface during the removal of the dielectric layer and first conductive layer, preventing direct exposure of the substrate to harmful factors while still allowing the manufacturing process to proceed.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If a second barrier layer is formed on the first barrier layer before removing the dielectric layer and first conductive layer, then substrate exposure and device damage are prevented, but the manufacturing process complexity increases

Engineering Contradiction:
Improvesubstrate protectionVSAvoidmanufacturing process steps
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent changes the protective parameter by introducing a second barrier layer with different material composition or structural properties compared to the first barrier layer. This parameter change enables the second barrier layer to provide enhanced or different types of protection during the removal process, preventing substrate exposure while maintaining compatibility with subsequent manufacturing steps.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11864373B2Method for manufacturing semiconductor structure with core and peripheral regions and semiconductor structure thereof
Publication Date: 2024.01.02 CHANGXIN MEMORY TECH INC
  • US11864373B2 patent drawing
  • US11864373B2 patent drawing
  • US11864373B2 patent drawing

AI summary

A method for manufacturing a semiconductor structure and a semiconductor structure are provided. The method includes the following operations. A substrate is provided, includes a core region and a peripheral region. A preset barrier layer is formed on the substrate, and covers the core region and the peripheral region. At least a part of the preset barrier layer corresponding to the peripheral region is removed to expose a part of the substrate, and to take a reserved part of the preset barrier layer as a first barrier layer. A dielectric layer and a first conductive layer are successively formed on the first barrier layer and the substrate. A part of the dielectric layer and the first conductive layer on the first barrier layer are removed, to reserve a part of the dielectric layer and the first conductive layer on the first barrier layer closer to the peripheral region.