Semiconductor Package Barrier Structure for Contamination Prevention
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Solution Overview
Problem
Existing semiconductor packages face contamination issues due to molding materials entering the electrical connection area, which affects reliability and is challenging to address while meeting miniaturization requirements.
Innovation Solution
A semiconductor package design featuring a barrier structure adjacent to the electrical connection area of the first substrate, which prevents molding materials and fillers from reaching the electrical connections by surrounding the connection area, combined with a molding layer that encapsulates the conductive terminals and electronic components without covering the barrier.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a molding process is performed to encapsulate stacked semiconductor substrates, then the substrates are protected and encapsulated, but contaminants from the molding material enter the electrical connection area
Solution Approach 1:
A barrier structure is introduced as an intermediary element between the molding material and the electrical connection area. This barrier structure prevents direct contact between the molding compound and the electrical connections, thereby eliminating contamination while maintaining the protective encapsulation function.
Solution Approach 2:
The electrical connection area is segmented from the rest of the package by introducing a barrier structure that divides the internal space. This segmentation isolates the sensitive electrical connections from the molding material, allowing the molding process to proceed without contamination risk.
2Volume of moving object
If the package size is reduced to meet miniaturization requirements, then the package becomes more compact, but the electrical connection area becomes more vulnerable to contamination
Solution Approach 1:
The barrier structure is nested within the package cavity, forming a concentric arrangement where the barrier surrounds the electrical connection area. This nested configuration provides protection without adding external volume, enabling miniaturization while maintaining contamination prevention.
Solution Approach 2:
The barrier structure utilizes the vertical dimension by extending from the first substrate toward the second substrate, creating a three-dimensional protective barrier. This vertical arrangement provides effective contamination prevention without increasing the planar footprint of the package.
Data Source
AI summary
A semiconductor package and a method of manufacturing the same are provided. The semiconductor package includes a first substrate, a second substrate, and a barrier structure. The first substrate has a first surface and a second surface opposite to the first surface. The second substrate has a first surface facing the second surface of the first substrate. The first substrate electrically bonds to the second substrate through a conductive terminal disposed between the second surface of the first substrate and the first surface of the second substrate. The barrier structure is disposed adjacent to the first surface of the first substrate.