Semiconductor Package Binding Layer Warpage Reduction

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Solution Overview

Problem

Three-dimensional semiconductor device packages face warpage issues due to asymmetrical structures and thermal cycles during manufacturing, and there is a need to reduce overall thickness for miniaturization.

Innovation Solution

A semiconductor device package design that includes a first conductive structure, a second conductive structure, a connection element, a conductive member, an encapsulant, and a binding layer, where the binding layer is interposed between the second conductive structure and the encapsulant, and the conductive member penetrates through the binding layer to alleviate warpage and reduce thickness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If a three-dimensional semiconductor device package with stacked structures is used, then integration density is improved, but warpage increases due to asymmetrical structure and thermal cycles

Engineering Contradiction:
Improveintegration densityVSAvoidwarpage
Core Design Contradiction:
Quantity of substanceVSStability of the object's composition

Solution Approach 1:

The patent applies asymmetry by introducing a binding layer specifically at the bottom interface between the encapsulant and the second conductive structure, rather than symmetrically at both interfaces. This asymmetric placement compensates for the inherent asymmetry in the stacked package structure, providing stress counterbalancing that reduces warpage while maintaining the high integration density of the 3D configuration.

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

The patent changes the physical and chemical parameters of the binding layer, including its material composition (epoxy resin with fillers), thickness (5-20 micrometers), and mechanical properties (modulus, adhesion strength). These parameter adjustments allow the binding layer to effectively compensate for thermal stress and reduce warpage while maintaining electrical and mechanical integrity of the stacked structure.

Inventive Principle:
Principle #35Parameter changes

2Length of moving object

If the overall thickness of the semiconductor device package is reduced for miniaturization, then device size is improved, but structural stability deteriorates

Engineering Contradiction:
Improveoverall thicknessVSAvoidstructural stability
Core Design Contradiction:
Length of moving objectVSStability of the object's composition

Solution Approach 1:

The patent employs the binding layer as a thin film structure (5-20 micrometers thick) that provides flexible stress compensation. This thin film is sufficient to reduce overall package thickness for miniaturization while maintaining structural stability through its engineered material properties and strategic placement at the critical bottom interface.

Inventive Principle:
Principle #30Flexible shells and thin films

Solution Approach 2:

The binding layer acts as an intermediary between the encapsulant and the second conductive structure, providing a mediating function that maintains structural stability. This intermediate layer compensates for stress and prevents direct stress concentration that would occur in a thinner package design, enabling miniaturization without sacrificing stability.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Strength

If thermal cycles during manufacturing are applied, then bonding strength is improved, but warpage increases due to characteristic mismatch between structural layers

Engineering Contradiction:
Improvebonding strengthVSAvoidwarpage
Core Design Contradiction:
StrengthVSStability of the object's composition

Solution Approach 1:

The binding layer provides beforehand cushioning by being pre-positioned at the bottom interface before final package assembly. This layer anticipates and compensates for the thermal stress that will occur during subsequent reflow and baking operations, reducing warpage while allowing the thermal cycles to proceed for achieving proper bonding strength.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Solution Approach 2:

The patent utilizes thermal expansion characteristics by selecting binding layer materials with specific thermal expansion coefficients that match or compensate for the mismatch between the encapsulant and conductive structures. This allows the binding layer to absorb thermal stress during manufacturing cycles, reducing warpage while maintaining bonding integrity.

Inventive Principle:
Principle #37Thermal expansion

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively reduces warpage to less than 100 micrometers and decreases the overall thickness of the semiconductor device package from 650 micrometers to less than 400 micrometers, improving reliability and yield by filling gaps and providing stress compensation.

Implementation Method 1

the binding layer is in contact with all the upper surface of the encapsulant and provides stress upon the encapsulant to compensate for the deformation of the underlying conductive structure

Methodology Applied
Scientific EffectStress compensation: Stress Relaxation

Implementation Method 2

the conductive member penetrates through the binding layer

Methodology Applied
Scientific EffectMechanical penetration: Mechanical Force

Implementation Method 3

An encapsulant is formed on the first conductive structure covering the connection element

Methodology Applied
Scientific EffectPhysical containment: Physical Containment

Data Source

PatentUS11404386B2Semiconductor device package and method of manufacturing the same
Publication Date: 2022.08.02 ADVANCED SEMICON ENG INC
  • US11404386B2 patent drawing
  • US11404386B2 patent drawing
  • US11404386B2 patent drawing

AI summary

A semiconductor device package and manufacturing method thereof are provided. The semiconductor device package includes a first conductive structure, a second conductive structure, a connection element, a conductive member, an encapsulant and a binding layer. The first conductive structure includes a first circuit layer. The second conductive structure is disposed over the first conductive structure. The connection element is disposed on and electrically connected to the first circuit layer. The conductive member protrudes from the second conductive structure. The encapsulant is disposed between the first conductive structure and the second conductive structure. The binding layer is disposed between the second conductive structure and the encapsulant.