Semiconductor Body Void Suppressing DIBL
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Solution Overview
Problem
In semiconductor memory devices with vertically disposed memory elements, drain-induced barrier lowering (DIBL) occurs due to the use of amorphous silicon bodies, leading to deteriorated cutoff characteristics as the depletion layer extends and the potential barrier lowers.
Innovation Solution
Incorporating a void within the body section of the semiconductor device, which is formed by depositing and planarizing amorphous silicon, and surrounding it with insulating films to restrict the expansion of the depletion layer when a drain voltage is applied, thereby suppressing DIBL and improving cutoff characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If amorphous silicon body is used in vertical transistor, then device integration is improved, but cutoff characteristics deteriorate due to DIBL
Solution Approach 1:
The patent applies local quality by introducing a void specifically in the lower portion of the body (away from the gate electrode) while maintaining amorphous silicon in other regions. This localized modification restricts depletion layer expansion in critical areas without compromising overall device integration, thereby improving cutoff characteristics while preserving the benefits of amorphous silicon bodies.
Solution Approach 2:
The void acts as an intermediary structure that mediates between the need for high device integration using amorphous silicon and the requirement for good cutoff characteristics. By introducing this intermediate feature, the patent enables the depletion layer to be restricted without removing the amorphous silicon body entirely, thus resolving the contradiction between integration and cutoff performance.
2Power
If drain voltage is elevated, then device operation is improved, but depletion layer expands causing DIBL
Solution Approach 1:
The patent applies preliminary anti-action by pre-introducing a void structure in the body that anticipates and counteracts the harmful expansion of the depletion layer when drain voltage is elevated. This preemptive structural modification creates a physical barrier that restricts depletion layer growth before it can significantly impact the potential barrier, thereby maintaining cutoff characteristics even at elevated drain voltages.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The presence of a void in the body section under the gate electrode restricts the expansion of the depletion layer, effectively suppressing DIBL and enhancing the cutoff characteristics of the semiconductor device.
Implementation Method 1
the presence of a void in the body section under the gate electrode restricts the expansion of the depletion layer, effectively suppressing DIBL
Implementation Method 2
surrounding it with insulating films to restrict the expansion of the depletion layer when a drain voltage is applied
Data Source
AI summary
A semiconductor device has a substrate, a source region formed on the surface portion of the substrate, a first insulating layer formed on the substrate, a gate electrode formed on the first insulating layer, a second insulating layer formed on the gate electrode, a body section connected with the source region, penetrating through the first insulating layer, the gate electrode and the second insulating layer, and containing a void, a gate insulating film surrounding the body section, and formed between the body section and the gate electrode, and a drain region connected with the body section.