Semiconductor Package Bonding Layers Warpage Control
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Solution Overview
Problem
Semiconductor packages face challenges in miniaturization, multifunctionalization, and increased storage capacity while experiencing warpage issues due to the rapid development of electronic devices, which affects their reliability.
Innovation Solution
A semiconductor package design that includes a substrate with stacked semiconductor chips and bonding layers with varying physical properties, such as coefficient of thermal expansion and curing shrinkage, to counteract warpage and improve reliability, featuring through vias, bumps, and a molding portion to enhance structural integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple semiconductor chips are stacked to increase storage capacity and miniaturize the package, then the storage capacity and integration density are improved, but warpage occurs due to thermal expansion and curing shrinkage differences
Solution Approach 1:
The bonding layers are divided into multiple groups (first, second, third bonding layers) with different physical properties at different locations between the substrate and semiconductor chips. Each bonding layer group has specifically designed curing shrinkage and coefficient of thermal expansion values to counteract warpage in its specific position, allowing the package to maintain flatness while achieving high integration density
Solution Approach 2:
The patent changes the physical parameters (curing shrinkage and coefficient of thermal expansion) of the bonding layers to resolve the warpage issue. By selecting bonding layers with different physical properties for different positions, the overall warpage of the package is reduced while maintaining the stacked configuration for high storage capacity
2Ease of manufacture
If bonding layers with uniform physical properties are used between stacked chips, then the manufacturing process is simplified, but warpage is exacerbated due to cumulative thermal expansion and curing shrinkage
Solution Approach 1:
Instead of using uniform bonding layers throughout, the patent applies local quality by dividing bonding layers into different groups (first, second, third bonding layers) with distinct physical properties at different positions. This allows each bonding layer to be optimized for its specific location to counteract warpage, while still maintaining a systematic manufacturing approach
3Volume of moving object
If the package size is reduced to meet miniaturization demands, then the portability and integration are improved, but warpage control becomes more difficult due to constrained space
Solution Approach 1:
The patent changes the physical parameters of the bonding layers to resolve the warpage issue in miniaturized packages. By selecting bonding layers with different physical properties (curing shrinkage and coefficient of thermal expansion) for different positions, the overall warpage is reduced while maintaining the compact stacked configuration
Solution Approach 2:
The patent uses composite material strategy by selecting bonding layers with different physical properties for different positions between the substrate and semiconductor chips. This composite approach allows the package to achieve both miniaturization and warpage control by combining materials with complementary properties in a layered structure
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design effectively reduces warpage and enhances the reliability of semiconductor packages by controlling thermal expansion and curing shrinkage, allowing for improved performance and stability in electronic devices.
Implementation Method 1
bonding layers having different physical properties, such as coefficient of thermal expansion and curing shrinkage, to counteract warpage
Implementation Method 2
bonding layers having different physical properties, such as coefficient of thermal expansion and curing shrinkage, to counteract warpage
Data Source
AI summary
A semiconductor package includes a substrate, a plurality of semiconductor chips stacked on the substrate, and a plurality of bonding layers bonded to lower surfaces of the plurality of semiconductor chips. The plurality of bonding layers may be divided into a plurality of groups, each having different physical properties depending on a distance from the substrate.