Semiconductor Storage Device Booster Circuit Read Timing
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Solution Overview
Problem
Current semiconductor storage devices face inefficiencies in data read operations due to prolonged charging times of word lines, particularly when using high voltages like VREAD, which increases the time required for data retrieval.
Innovation Solution
The semiconductor storage device employs a booster circuit to rapidly charge all word lines to a high voltage (VREAD) before confirming the block address, and then switches to a lower voltage (VCGRV) for selected word lines, reducing overall read time by minimizing load and optimizing charging routes through the UCG driver, which reduces the number of switch circuits involved.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If high voltage (VREAD) is used to charge word lines during read operations, then sufficient voltage is provided for data retrieval, but the charging time is prolonged
Solution Approach 1:
The booster circuit charges all word lines to VREAD in advance before the block address is confirmed. This preliminary charging action ensures that when the read operation proceeds, the word lines are already at the required high voltage, eliminating the need for time-consuming voltage application during the actual read process
Solution Approach 2:
The system dynamically switches voltage levels based on operational phase: using VREAD (high voltage) during the preliminary charging phase and VCGRV (lower voltage) during the selected word line phase. This dynamic voltage adjustment optimizes both speed and energy efficiency at different stages of the read operation
2Productivity
If all word lines are charged to VREAD before confirming block address, then read time is reduced, but power consumption increases
Solution Approach 1:
Instead of maintaining high voltage on all word lines throughout the read operation, the system applies VREAD only temporarily to all word lines before address confirmation, then switches to VCGRV for the selected word lines. This localized and temporary high voltage application achieves fast read speeds while minimizing overall power consumption
Solution Approach 2:
The system changes the voltage parameter from VREAD to VCGRV after the preliminary charging phase. This parameter change allows the system to maintain high productivity during the critical timing window while reducing power consumption for the remainder of the operation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces the time needed for data read operations by charging all word lines simultaneously before confirming the block address and using a lower voltage for selected lines, thereby enhancing data retrieval efficiency.
Implementation Method 1
a first booster circuit configured to boost an output voltage thereof to a first voltage
Implementation Method 2
a first transistor that is controlled to connect the word line to the wiring
Data Source
AI summary
A semiconductor storage device comprises a memory block including first and second memory cells, first and second word lines electrically connected to the first and second memory cells, respectively, first and second booster circuits, and a control circuit. During a read operation in which the first word line is a selected word line, the control circuit controls the first booster circuit to start boosting the output voltage thereof before a target block address associated with the read command is determined, causes the output voltage of the first booster circuit to be supplied to the first and second word lines, controls the second booster circuit to start boosting the output voltage thereof, and causes the output voltage of the second booster circuit, instead of the output voltage of the first booster circuit, to be supplied to the first word line.