Semiconductor Boundary Structure for HV-LV Isolation Integrity
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Solution Overview
Problem
The integration of high-voltage and low-voltage devices in semiconductor integrated circuits faces challenges due to boundary defects and contamination issues between high-voltage and low-voltage regions, particularly at the 28 nm node and beyond, where different gate dielectric thicknesses are required, leading to isolation damage and residue contamination.
Innovation Solution
A semiconductor structure with a boundary structure disposed in the boundary region between low-voltage and high-voltage regions is formed, which includes a supporting layer with a slanted sidewall and a conformal boundary structure that reduces residue contamination and isolation damage, providing structural support and minimizing the dishing effect during fabrication.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If different gate dielectric thicknesses are used for high-voltage and low-voltage regions, then device performance is improved, but boundary defects and contamination occur between regions
Solution Approach 1:
The substrate is divided into distinct high-voltage and low-voltage regions separated by a boundary structure. This segmentation allows different gate dielectric thicknesses to be implemented in each region independently, optimizing device performance for each voltage regime while preventing contamination and defects at the interface between regions.
Solution Approach 2:
A boundary structure acts as an intermediary element between the high-voltage and low-voltage regions. This boundary structure includes a supporting layer with a slanted sidewall that physically separates the two regions, preventing contamination and isolation damage while allowing both regions to maintain their required gate dielectric configurations.
2Object-affected harmful factors
If isolation structures are added to separate high-voltage and low-voltage regions, then contamination is reduced, but dishing effect and structural instability occur
Solution Approach 1:
A supporting layer is formed in advance within the boundary structure before final processing steps. This supporting layer has a slanted sidewall that provides preliminary structural support during fabrication, preventing dishing effect and maintaining structural integrity while still allowing the isolation structure to reduce contamination and isolation damage.
Solution Approach 2:
The boundary structure employs a composite design combining a supporting layer with a slanted sidewall profile and the isolation structure. This composite structure integrates both the contamination-reducing isolation function and the dishing-preventing structural support function into a single unified boundary region design.
3Ease of manufacture
If conventional fabrication processes are used, then manufacturing simplicity is maintained, but residue contamination and isolation damage increase
Solution Approach 1:
The patent applies local quality by implementing a specialized boundary structure with a slanted sidewall supporting layer only at the critical interface region between high-voltage and low-voltage devices. This localized modification targets the specific area where contamination and isolation damage occur, while the rest of the fabrication process can follow conventional simpler procedures.
Data Source
AI summary
A semiconductor structure and forming method thereof are provided. A substrate includes a first region, a second region, and a boundary region defined between the first region and the second region. An isolation structure is disposed in the boundary region. An upper surface of the isolation structure has a stepped profile. A first boundary dielectric layer and a second boundary dielectric layer are disposed over the isolation structure. The first boundary dielectric layer is substantially conformal with respect to the stepped profile of the isolation structure.