Semiconductor Boundary Region Structure for Conduction Loss Reduction
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Solution Overview
Problem
Conventional RC-IGBTs experience conduction loss and increased reverse recovery time in FWD regions due to the presence of emitter regions between IGBT and FWD portions, which affects the overall efficiency and reliability of semiconductor devices.
Innovation Solution
A semiconductor device structure is introduced where the boundary region between IGBT and FWD regions lacks emitter regions, featuring a defect region and specific mesa portions with varying conductivity-type impurity doping concentrations, and trench portions with insulation and conductive films to reduce current interference and conduction loss.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If emitter regions are provided between IGBT and FWD portions, then current conduction is facilitated, but conduction loss increases and reverse recovery time increases in FWD regions
Solution Approach 1:
The semiconductor device is divided into distinct IGBT region, boundary region, and FWD region. The boundary region acts as a transition zone that segments the harmful influence between IGBT and FWD portions, preventing emitter regions from extending into FWD regions while maintaining proper current conduction in each functional area.
Solution Approach 2:
The boundary region serves as an intermediary zone between IGBT and FWD regions. It contains defect regions and specific mesa portions with controlled doping concentrations that mediate the transition, allowing the IGBT region to have emitter regions for good conduction while preventing these emitter regions from causing conduction loss and extended reverse recovery time in the FWD region.
2Productivity
If emitter regions extend into FWD regions, then device integration is improved, but reverse recovery time increases
Solution Approach 1:
The device structure is segmented into IGBT region, boundary region, and FWD region with clear spatial separation. The boundary region contains defect regions that act as barriers, preventing emitter regions from extending into FWD regions. This segmentation maintains high device integration by keeping all functional regions on one substrate while preventing harmful interactions that would increase reverse recovery time.
Solution Approach 2:
Defect regions, which are typically harmful to semiconductor performance, are strategically placed in the boundary region and converted into beneficial elements. These defect regions act as barriers that prevent emitter region extension into FWD regions, thereby reducing reverse recovery time while maintaining proper device integration and functionality.
3Area of stationary object
If IGBT and FWD regions are closely integrated, then device area is reduced, but current interference between regions increases
Solution Approach 1:
The semiconductor device integrates IGBT and FWD regions in close proximity to minimize device area, while the boundary region with defect regions segments the current paths. This segmentation prevents current interference between regions by creating electrical isolation zones, allowing high-density integration without suffering from harmful current interactions.
Solution Approach 2:
The boundary region acts as an intermediary zone between closely integrated IGBT and FWD regions. It contains defect regions and controlled doping structures that mediate current flow, preventing direct current interference between the two functional regions while maintaining compact device integration and minimizing overall device area.
Data Source
AI summary
A semiconductor device is provided, including a semiconductor substrate, wherein the semiconductor substrate has: a diode region; a transistor region; and a boundary region that is positioned between the diode region and the transistor region, the boundary region includes a defect region that is provided: at a predetermined depth position on a front surface-side of the semiconductor substrate; and to extend from an end portion of the boundary region adjacent to the diode region toward the transistor region, at least part of the boundary region does not include a first conductivity-type emitter region exposed on a front surface of the semiconductor substrate, and the transistor region does not have the defect region below a mesa portion that is sandwiched by two adjacent trench portions, and closest to the boundary region among the mesa portions having the emitter region.


